CY7C0430V

PRELIMINARY CY7C0430V 3.3V 64K x 18 Synchronous QuadPort™ Static RAM Features True four-ported memory cells which allow simultaneous access of the same memory location Synchronous Pipelined device — 64K x 18 organization Pipelined output mode allows fast 133-MHz operation High Bandwidth up to 10 Gbps (133 MHz x 18 bits wide x 4 ports) 0.25-micron CMOS for optimum speed/power High-speed clock to data access 4.7 ns (max.) 3.3V Low operating power — Active = 750 mA (maximum) — Standby = 5 mA (maximum) Counter wrap-around control — Internal mask register controls counter wrap-around — Counter-Interrupt flags to indicate wrap-around Counter readback on address lines Mask register readback on address lines Interrupt flags for message passing Master reset for all ports Width and depth expansion capabilities Dual Chip Enables on all ports for easy depth expansion Separate upper-byte and lower-byte controls on all ports...