DatasheetsPDF.com

CY7C343B

Cypress

64-Macrocell MAX EPLD

fax id: 61021CY7C343B Features • 64 MAX macrocells in 4 LABs • 8 dedicated inputs, 24 bidirectional I/O pins • Programm...


Cypress

CY7C343B

File Download Download CY7C343B Datasheet


Description
fax id: 61021CY7C343B Features 64 MAX macrocells in 4 LABs 8 dedicated inputs, 24 bidirectional I/O pins Programmable interconnect array 0.8-micron double-metal CMOS EPROM technology (CY7C343) Advanced 0.65-micron CMOS technology to increase performance (CY7C343B) Available in 44-pin HLCC, PLCC Lowest power MAX device CY7C343 CY7C343B 64-Macrocell MAX® EPLD Functional Description The CY7C343/CY7C343B is a high-performance, high-density erasable programmable logic device, available in 44-pin PLCC and HLCC packages. The CY7C343/CY7C343B contains 64 highly flexible macrocells and 128 expander product terms. These resources are divided into four Logic Array Blocks (LABs) connected through the Programmable Inter-connect Array (PIA). There are 8 input pins, one that doubles as a clock pin when needed. The CY7C343/CY7C343B also has 28 I/O pins, each connected to a macrocell (6 for LABs A and C, and 8 for LABs B and D). The remaining 36 macrocells are used for em...




Similar Datasheet




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)