MC10117

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual 2-Wide 2-3-Input OR-AND/OR-AND Gate The MC10117 is a dual 2–wide 2–3–input OR–AND/OR–AND–Invert gate. This general purpose logic element is designed for use in data control, such as digital multiplexing or data distribution. Pin 9 is common to both gates. PD = 100 mW typ/pkg (No Load) tpd = 2.3 ns typ tr, tf = 2.2 ns typ (20%–80%) LOGIC DIAGRAM 4 5 6 7 9 10 11 12 13 VCC1 = PIN 1 VCC2 = PIN 16 VEE = PIN 8 3 2 14 15 MC10117 L SUFFIX CERAMIC PACKAGE CASE 620–10 P SUFFIX PLASTIC PACKAGE CASE 648–08 FN SUFFIX PLCC CASE 775–02 DIP PIN ASSIGNMENT VCC1 AOUT AOUT A1IN A1IN A2IN A2IN VEE 1 2 3 4 5 6 7 8 16 VCC2 15 BOUT 14 BOUT 13 B1IN 12 B1IN 11 B2IN 10 B2IN 9 A2IN, B2IN Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6–11 of the Motorola MECL Data Book (DL122/D). 3/93 © Motorola, Inc. 1996 3–68 REV 5 MC10117 ELECTRICAL CHARACTERISTICS Characteristic ...