MC10110

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual 3-Input/3-Ouput OR Gate The MC10110 is designed to drive up to three transmission lines simul– taneously. The multiple outputs of this device also allow the wire “OR”–ing of several levels of gating for minimization of gate and package count. The ability to control three parallel lines from a single point makes the MC10110 particularly useful in clock distribution applications where minimum clock skew is desired. Three VCC pins are provided and each one should be used. PD = 80 mW typ/pkg (No Load) tpd = 2.4 ns typ (All Outputs Loaded) tr, tf = 2.2 ns typ (20%–80%) MC10110 L SUFFIX CERAMIC PACKAGE CASE 620–10 P SUFFIX PLASTIC PACKAGE CASE 648–08 LOGIC DIAGRAM 5 62 73 4 9 10 12 11 13 14 VCC1 = PIN 1, 15 VCC2 = PIN 16 VEE = PIN 8 DIP PIN ASSIGNMENT VCC1 AOUT AOUT AOUT AIN AIN AIN VEE 1 2 3 4 5 6 7 8 16 VCC2 15 VCC1 14 BOUT 13 BOUT 12 BOUT 11 BIN 10 BIN 9 BIN Pin assignment is for Dual–in–Line Package. For PLCC pin assignm...