MC10175

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quint Latch The MC10175 is a high speed, low power quint latch. It features five D type latches with common reset and a common two–input clock. Data is transferred on the negative edge of the clock and latched on the positive edge. The two clock inputs are “OR”ed together. Any change on the data input will be reflected at the outputs while the clock is low. The outputs are latched on the positive transition of the clock. While the clock is in the high state, a change in the information present at the data inputs will not affect the output information. The reset input is enabled only when the clock is in the high state. PD = 400 mW typ/pkg (No Load) tpd = 2.5 ns typ (Data to Output) tr, tf = 2.0 ns typ (20%–80%) D0 10 LOGIC DIAGRAM DQ CR 14 Q0 D1 12 D2 13 D3 9 D4 C0 C1 RESET 5 6 7 11 DQ CR 15 Q1 DQ CR 2 Q2 DQ CR 3 Q3 DQ CR 4 Q4 VCC1 = PIN 1 VCC2 = PIN 16 VEE = PIN 8 MC10175 L SUFFIX CERAMIC PACKAGE CASE 620–10 P SUFFIX P...