LVDS 21-Bit Serializers/De-Serializers
FIN1215 / FIN1216 / FIN1217 — LVDS 21-Bit Serializers / De-Serializers
September 2009
FIN1215 / FIN1216 / FIN1217/ FIN...
Description
FIN1215 / FIN1216 / FIN1217 — LVDS 21-Bit Serializers / De-Serializers
September 2009
FIN1215 / FIN1216 / FIN1217/ FIN1218 LVDS 21-Bit Serializers / De-Serializers
Features
Low Power Consumption 20MHz to 85MHz Shift Clock Support 50% Duty Cycle on the Clock Output of Receiver ±1V Common-mode Range ~1.2V Narrow Bus Reduces Cable Size and Cost High Throughput: 1.785Gbps Up to 595Mbps per Channel Internal PLL with No External Components Compatible with TIA/EIA-644 Specification Offered in 48-lead TSSOP Packages
Description
The FIN1217 and FIN1215 transform 21-bit wide parallel LVTTL (Low-Voltage TTL) data into three serial LVDS (Low-Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data stream over a separate LVDS link. Every cycle of transmit clock, 21 bits of input LVTTL data are sampled and transmitted.
The FIN1216 and FIN1218 receives and converts the three serial LVDS data streams back ...
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