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BUK554-60H Dataheets PDF



Part Number BUK554-60H
Manufacturers NXP
Logo NXP
Description PowerMOS transistor Logic level FET
Datasheet BUK554-60H DatasheetBUK554-60H Datasheet (PDF)

Philips Semiconductors Product specification PowerMOS transistor Logic level FET GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope The device is intended for use in automotive and general purpose switching applications. BUK554-60H QUICK REFERENCE DATA SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-state resistance; VGS = 5 V MAX. 60 39 125.

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Philips Semiconductors Product specification PowerMOS transistor Logic level FET GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope The device is intended for use in automotive and general purpose switching applications. BUK554-60H QUICK REFERENCE DATA SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-state resistance; VGS = 5 V MAX. 60 39 125 175 42 UNIT V A W ˚C mΩ PINNING - TO220AB PIN 1 2 3 tab gate drain DESCRIPTION PIN CONFIGURATION tab SYMBOL d g source drain 1 23 s LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR ±VGS ±VGSM ID ID IDM Ptot Tstg Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Non-repetitive gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage temperature Junction temperature CONDITIONS RGS = 20 kΩ tp ≤ 50 µs Tmb = 25 ˚C Tmb = 100 ˚C Tmb = 25 ˚C Tmb = 25 ˚C MIN. - 55 MAX. 60 60 15 20 39 28 156 125 175 175 UNIT V V V V A A A W ˚C ˚C THERMAL RESISTANCES SYMBOL Rth j-mb Rth j-a PARAMETER Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS TYP. 60 MAX. 1.2 UNIT K/W K/W August 1996 1 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor Logic level FET STATIC CHARACTERISTICS Tmb = 25 ˚C unless otherwise specified SYMBOL V(BR)DSS VGS(TO) IDSS IDSS IGSS RDS(ON) PARAMETER Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current Zero gate voltage drain current Gate source leakage current Drain-source on-state resistance CONDITIONS VGS = 0 V; ID = 0.25 mA VDS = VGS; ID = 1 mA VDS = 60 V; VGS = 0 V; Tj = 25 ˚C VDS = 60 V; VGS = 0 V; Tj =125 ˚C VGS = ±15 V; VDS = 0 V VGS = 5 V; ID = 20 A MIN. 60 1.0 - BUK554-60H TYP. 1.5 1 0.1 10 35 MAX. 2.0 10 1.0 100 42 UNIT V V µA mA nA mΩ DYNAMIC CHARACTERISTICS Tmb = 25 ˚C unless otherwise specified SYMBOL gfs Ciss Coss Crss td on tr td off tf Ld Ld Ls PARAMETER Forward transconductance Input capacitance Output capacitance Feedback capacitance Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal drain inductance Internal source inductance CONDITIONS VDS = 25 V; ID = 20 A VGS = 0 V; VDS = 25 V; f = 1 MHz MIN. 10 TYP. 18 1100 420 160 25 110 150 100 3.5 4.5 7.5 MAX. 1750 600 275 40 150 220 145 UNIT S pF pF pF ns ns ns ns nH nH nH VDD = 30 V; ID = 3 A; VGS = 5 V; RGS = 50 Ω; Rgen = 50 Ω Measured from contact screw on tab to centre of die Measured from drain lead 6 mm from package to centre of die Measured from source lead 6 mm from package to source bond pad REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS Tmb = 25 ˚C unless otherwise specified SYMBOL IDR IDRM VSD trr Qrr PARAMETER Continuous reverse drain current Pulsed reverse drain current Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS IF = 39 A ; VGS = 0 V IF = 39 A; -dIF/dt = 100 A/µs; VGS = 0 V; VR = 30 V MIN. TYP. 0.95 60 0.30 MAX. 39 156 2.0 UNIT A A V ns µC AVALANCHE LIMITING VALUE Tmb = 25 ˚C unless otherwise specified SYMBOL WDSS PARAMETER Drain-source non-repetitive unclamped inductive turn-off energy CONDITIONS ID = 39 A ; VDD ≤ 25 V ; VGS = 5 V ; RGS = 50 Ω MIN. TYP. MAX. 90 UNIT mJ August 1996 2 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor Logic level FET BUK554-60H 120 110 100 90 80 70 60 50 40 30 20 10 0 PD% Normalised Power Derating 10 Zth(j-mb) K/W BUK464-60H D= 1 0.5 0.2 0.1 0.05 0.02 0.01 0 P D tp D= tp T t 0.1 0 20 40 60 80 100 Tmb / C 120 140 160 180 0.001 1E-07 T 1E-05 1E-03 tp / sec 1E-01 1E+01 Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Tmb) ID% Normalised Current Derating Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T ID / A 100 BUK564-60H 10 8 6 80 VGS / V = 5 4.5 40 4 3.5 20 3 2.5 0 1 2 VDS / V 3 4 5 120 110 100 90 80 70 60 50 40 30 20 10 0 60 0 20 40 60 80 100 Tmb / C 120 140 160 180 0 Fig.2. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 5 V ID / A 1000 Fig.5. Typical output characteristics, Tj = 25 ˚C. ID = f(VDS); parameter VGS RDS(ON) / Ohm 0.1 0.08 2.5 3 3.5 4 BUK564-60H BUK564-60H 4.5 5 VGS / V = 100 RD 10 O S( N) =V / DS ID tp = 10 us 100 us 0.06 0.04 6 8 10 1 ms DC 10 ms 100 ms 100 VDS / V 0.02 0 1 1 10 0 20 40 ID / A 60 80 100 Fig.3. Safe operating area. Tmb = 25 ˚C ID & IDM = f(VDS); IDM single pulse; parameter tp Fig.6. Typical on-state resistance, Tj = 25 ˚C. RDS(ON) = f(ID); parameter VGS August 1996 3 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor Logic level FET BUK554-60H 80 ID / A BUK564-60H 2 VGS(TO) / V max. 60 Tj / C = 40 25 20 1 -40 150 .


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