Philips Semiconductors
Product specification
TrenchMOS™ transistor Standard level FET
GENERAL DESCRIPTION
N-channel en...
Philips Semiconductors
Product specification
TrenchMOS™
transistor Standard level FET
GENERAL DESCRIPTION
N-channel enhancement mode standard level field-effect power
transistor in a plastic envelope suitable for surface mounting. Using ’trench’ technology, the device features very low on-state resistance and has integral zener diodes giving ESD protection up to 2kV. It is intended for use in automotive and general purpose switching applications.
BUK7830-30
QUICK REFERENCE DATA
SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Tsp = 25 ˚C Drain current (DC) Tamb = 25 ˚C Total power dissipation Junction temperature Drain-source on-state resistance VGS = 10 V MAX. 30 12.8 5.9 8.3 150 30 UNIT V A A W ˚C mΩ
PINNING - SOT223
PIN 1 2 3 4 gate drain source drain (tab) DESCRIPTION
PIN CONFIGURATION
4
SYMBOL
d
g s
1
2
3
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR ±VGS ID ID IDM Ptot Tstg, Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage & operating temperature CONDITIONS RGS = 20 kΩ Tsp = 25 ˚C Tamb = 25 ˚C Tsp = 100 ˚C Tamb = 100 ˚C Tsp = 25 ˚C Tamb = 25 ˚C Tsp = 25 ˚C Tamb = 25 ˚C MIN. - 55 MAX. 30 30 16 12.8 5.9 9 4.1 51.2 23.6 8.3 1.8 150 UNIT V V V A A A A A A W W ˚C
THERMAL RESISTANCES
SYMBOL Rth j-sp Rth j-amb PARAMETER Thermal resistance junction to ...