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Philips Semiconductors
Product specification
Insulated Gate Bipolar Transistor Protected Logic-Level IGBT
GENERAL DESCRIPTION
Protected N-channel logic-level insulated gate bipolar power transistor in a plastic envelope suitable for surface mount applications. It is intended for automotive ignition applications, and has integral zener diodes providing active collector voltage clamping and ESD protection up to 2 kV.
BUK866-400 IZ
QUICK REFERENCE DATA
SYMBOL PARAMETER V(CL)CER VCEsat IC Ptot ECERS Collector-emitter clamp voltage Collector-emitter on-state voltage Collector current (DC) Total power dissipation Clamped energy dissipation MIN. TYP. MAX. UNIT 350 400 500 2.2 20 100 300 V V A W mJ
PINNING - SOT404
PIN 1 2 3 tab gate collector emitter collector DESCRIPTION
PIN CONFIGURATION
mb
SYMBOL
c
g
2 1 3
e
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VCE VCE ±VGE IC IC ICM ICLM ECERS ECERR EECR Ptot Tstg Tj PARAMETER Collecter-emitter voltage Collector-emitter voltage Gate-emitter voltage Collector current (DC) Collector current (DC) Collector current (pulsed peak value, on-state) Collector current (clamped inductive load) Clamped turn-off energy (non-repetitive) Clamped turn-off energy (repetitive) Reverse avalanche energy (repetitive) Total power dissipation Storage temperature Operating Junction Temperature CONDITIONS tp ≤ 500 µs Continuous Tmb = 100 ˚C Tmb = 25 ˚C Tmb = 25 ˚C; tp ≤ 10 ms; VCE ≤ 15 V 1 kΩ ≤ RG ≤ 10 kΩ Tmb = 25 ˚C; IC = 10 A; RG = 1 kΩ; see Figs. 23,24 Tmb = 125 ˚C; IC = 8 A; RG = 1 kΩ; f = 50 Hz; t = 60 min. IE = 1 A; f = 50 Hz Tmb = 25 ˚C MIN. -20 -55 -40 MAX. 500 50 12 10 20 25 10 300 125 5 125 150 150 UNIT V V V A A A A mJ mJ mJ W ˚C ˚C
ESD LIMITING VALUE
SYMBOL VC PARAMETER Electrostatic discharge capacitor voltage CONDITIONS Human body model (100 pF, 1.5 kΩ) MIN. MAX. 2 UNIT kV
December 1996
1
Rev. 1.100
Philips Semiconductors
Product specification
Insulated Gate Bipolar Transistor Protected Logic-Level IGBT
THERMAL RESISTANCES
SYMBOL Rth j-mb Rth j-a PARAMETER Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS minimum footprint, FR4 board (see Fig. 26).
BUK866-400 IZ
TYP. 50
MAX. 1.0 -
UNIT K/W K/W
STATIC CHARACTERISTICS
Tmb = 25 ˚C unless otherwise specified SYMBOL V(BR)CG V(BR)EC ±V(BR)GES VGE(TO) VGE(TO) ICES ICES IEC IEC IGES VCEsat PARAMETER Collector-gate zener breakdown voltage Reverse collector-emitter breakdown voltage Gate-emitter breakdown voltage Gate threshold voltage Gate threshold voltage Zero gate voltage collector current Zero gate voltage collector current Reverse collector current Reverse collector current Gate emitter leakage current Collector-emitter on-state voltage CONDITIONS 2 mA ≤ -IG ≤ 5 mA; -40 ≤ Tj ≤150˚C IE = 10 mA IG = ± 1 mA VCE = VGE; IC = 1 mA VCE = VGE; IC = 1 mA; -40 ≤ Tj ≤150˚C VCE = 50 V; VGE = 0 V; Tj = 25 ˚C Tj = 125 ˚C VCE = -20 V VCE = -20 V; Tj = 125˚C VGE = ±6 V Tj = 150˚C VGE = 4.5 V; IC = 8 A VGE = 3.5 V; IC = 6 A; -40 ≤ Tj ≤150˚C MIN. 350 20 12 1 0.6 TYP. 400 30 16 1.5 0.01 0.01 0.2 2 0.1 5 1.2 1.2 MAX. 500 50 20 2 2.4 10 1 5 20 1 100 2.2 2.2 UNIT V V V V V µA mA mA mA µA µA V V
DYNAMIC CHARACTERISTICS
Tmb = 25 ˚C unless otherwise specified SYMBOL V(CL)CER PARAMETER CONDITIONS MIN. 350 TYP. 400 MAX. 500 UNIT V Collector-emitter clamp voltage RG = 1 kΩ; IC = 10 A; (peak value) -40 ≤ Tj ≤150˚C; Inductive load; see Figs. 23,24 Forward transconductance Input capacitance Output capacitance Feedback capacitance Turn-off delay time Fall time Crossover Time Turn-off Energy loss VCE = 15 V; IC = 4 A VGE = 0 V; VCE = 25 V; f = 1 MHz
gfe Cies Coes Cres td off tf tc Eoff
5.5 -
15 940 95 30 13 6 12 13
20 1200 130 50 18 10 -
S pF pF pF µs µs µs mJ
IC = 8 A; VCL = 300 V; RG = 1 kΩ; VGE = 5 V; Tj = 125˚C; Inductive load; see Figs. 20,21
December 1996
2
Rev. 1.100
Philips Semiconductors
Product specification
Insulated Gate Bipolar Transistor Protected Logic-Level IGBT
BUK866-400 IZ
1E+01
Zth(j-mb) / (K/W)
120 110 100 90 80 70 60 50 40
P D t p t D= p T
PD%
Normalised Power Derating
1E+00
D= 0.5 0.2
1E-01
0.1 0.05 0.02
1E-02
0
30 20 10 0
1E+01
t T
1E-03 1E-07
1E-05
1E-03 t/s
1E-01
0
20
40
60
80 100 Tmb / C
120
140
Fig.1. Transient thermal impedance Z th j-mb = f(t) ; parameter D = tp/T
IC / A I CLM 10 BUK8Y6-400IZ
Fig.4. Normalised power dissipation. PD% = 100.PD/PD 25˚C = f(Tmb)
ICLM / A BUK8Y6-400IZ
15
10
Self-clamped 1
5
0.1 0 200 VCE / V 400 600
0 0 50 100 150 dVCE/dt (V/us) 200
Fig.2. Turn-off Safe Operating Area conditions: Tj ≤ Tjmax. ; RG ≥ 1 kΩ
VCE / V
Tj / C = 150 25 -40
Fig.5. Derating of ICLM with turn-off dVCE/dt conditions: VCE ≤ 500 V; Tj ≤ Tjmax.
VCE / V
150 Tj / C = 25 -40
3
PMG35A
2
PMG35A
1.5
2
1
1
0.5
0 0 4 8 12 16 IC / A 20 24
0 0 4 8 12 16 IC / A 20 24
Fig.3. Typical On-state Voltage VCEsat = f(IC); parameter Tj; conditions: VGE = 3.5 V
Fig.6. Typical On-state Volt.