BUK9120-48TC

Philips Semiconductors Product specification PowerMOS transistor Voltage clamped logic level FET with temperature sensing diodes GENERAL DESCRIPTION Protected N-channel enhancement mode logic level field-effect power transistor in a plastic envelope suitable for surface mounting. Using ’trench’ technology the device features very low on-state resistance and has integral zener diodes giving ESD protection up to 2kV and active drain voltage clamping. Temperature sensitive diodes are incorporated for monitoring chip temperature. The device is intended for use in automotive and general purpose switching applications. BUK9120-48TC QUICK REFERENCE DATA SYMBOL V(CL)DSR ID Ptot Tj RDS(ON) VF -SF PARAMETER Drain-source clamp voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-state resistance; VGS = 5 V Forward voltage,temperature sense diodes Negative temperature coefficient, temperature sense diodes MIN. 40 TYP. 45 MAX. UNIT 55 52 116 175 20 735 1.54 V A W ˚C mΩ mV mV/K 685 1.26 710 1.4 PINNING - SOT426 PIN 1 2 3 4 5 mb gate T1 (connected to mb) T2 source drain DESCRIPTION PIN CONFIGURATION SYMBOL d mb T1 g 3 T2 1 2 4 5 s Fig. 2. Fig. 1. LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDG ±VGS ID ID ID IDM Ptot IGD IGS VTS Tstg Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (DC) Drain current (DC) Drain current (pulse peak...