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BUK9605-30A Dataheets PDF



Part Number BUK9605-30A
Manufacturers NXP
Logo NXP
Description TrenchMOS transistor Logic level FET
Datasheet BUK9605-30A DatasheetBUK9605-30A Datasheet (PDF)

Philips Semiconductors Product specification TrenchMOS™ transistor Logic level FET GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope suitable for surface mounting. Using ’trench’ technology the device features very low on-state resistance. It is intended for use in automotive and general purpose switching applications. BUK9605-30A QUICK REFERENCE DATA SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current (DC) T.

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Philips Semiconductors Product specification TrenchMOS™ transistor Logic level FET GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope suitable for surface mounting. Using ’trench’ technology the device features very low on-state resistance. It is intended for use in automotive and general purpose switching applications. BUK9605-30A QUICK REFERENCE DATA SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-state resistance VGS = 5 V VGS = 10 V MAX. 30 75 230 175 5 4.6 UNIT V A W ˚C mΩ mΩ PINNING - SOT404 PIN 1 2 3 mb gate drain (no connection possible) source drain DESCRIPTION PIN CONFIGURATION mb SYMBOL d g 2 1 3 s LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR ±VGS ±VGSM ID ID IDM Ptot Tstg, Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Non-repetitive gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage & operating temperature CONDITIONS RGS = 20 kΩ tp≤50µS Tmb = 25 ˚C Tmb = 100 ˚C Tmb = 25 ˚C Tmb = 25 ˚C MIN. - 55 MAX. 30 30 10 15 75 75 400 230 175 UNIT V V V V A A A W ˚C THERMAL RESISTANCES SYMBOL Rth j-mb Rth j-a PARAMETER Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS Minimum footprint, FR4 board TYP. 50 MAX. 0.65 UNIT K/W K/W August 1999 1 Rev 1.100 Philips Semiconductors Product specification TrenchMOS™ transistor Logic level FET STATIC CHARACTERISTICS Tj= 25˚C unless otherwise specified SYMBOL V(BR)DSS VGS(TO) IDSS IGSS RDS(ON) PARAMETER Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current Gate source leakage current Drain-source on-state resistance CONDITIONS VGS = 0 V; ID = 0.25 mA; Tj = -55˚C VDS = VGS; ID = 1 mA Tj = 175˚C Tj = -55˚C VDS = 30 V; VGS = 0 V; VGS = ±10 V; VDS = 0 V VGS = 5 V; ID = 25 A VGS = 10 V; ID = 25 A VGS = 4.5 V; ID = 25 A Tj = 175˚C Tj = 175˚C MIN. 30 27 1 0.5 - BUK9605-30A TYP. 1.5 0.05 2 4.3 3.9 - MAX. 2.0 2.3 10 500 100 5 9.3 4.6 5.4 UNIT V V V V V µA µA nA mΩ mΩ mΩ mΩ DYNAMIC CHARACTERISTICS Tmb = 25˚C unless otherwise specified SYMBOL Ciss Coss Crss td on tr td off tf Ld Ls PARAMETER Input capacitance Output capacitance Feedback capacitance Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal source inductance CONDITIONS VGS = 0 V; VDS = 25 V; f = 1 MHz MIN. TYP. 6500 1500 1000 45 220 435 320 2.5 7.5 MAX. 8600 1800 1350 65 330 600 450 UNIT pF pF pF ns ns ns ns nH nH VDD = 30 V; Rload =1.2Ω; VGS = 5 V; RG = 10 Ω Measured from upper edge of drain tab to centre of die Measured from source lead soldering point to source bond pad REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS Tj = 25˚C unless otherwise specified SYMBOL IDR IDRM VSD trr Qrr PARAMETER Continuous reverse drain current Pulsed reverse drain current Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS MIN. IF = 25 A; VGS = 0 V IF = 75 A; VGS = 0 V IF = 75 A; -dIF/dt = 100 A/µs; VGS = -10 V; VR = 30 V TYP. 0.85 1.1 400 1.0 MAX. 75 240 1.2 UNIT A A V V ns µC AVALANCHE LIMITING VALUE SYMBOL WDSS PARAMETER Drain-source non-repetitive unclamped inductive turn-off energy CONDITIONS ID = 75 A; VDD ≤ 25 V; VGS = 5 V; RGS = 50 Ω; Tmb = 25 ˚C MIN. TYP. MAX. 500 UNIT mJ August 1999 2 Rev 1.100 Philips Semiconductors Product specification TrenchMOS™ transistor Logic level FET BUK9605-30A 120 110 100 90 80 70 60 50 40 30 20 10 0 PD% Normalised Power Derating 1 D= 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0 Zth / (K/W) P D tp D= tp T t T 0 20 40 60 80 100 Tmb / C 120 140 160 180 0.001 0.00001 0.001 t/S 0.1 10 Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Tmb) 400 ID/V 300 Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T 120 110 100 90 80 70 60 50 40 30 20 10 0 ID% Normalised Current Derating 10.0 7.0 6.0 5.0 4.8 4.6 4.4 VGS/V = 4.2 4.0 3.8 3.6 200 3.4 3.2 3.0 2.8 2.6 2.4 100 0 20 40 60 80 100 Tmb / C 120 140 160 180 0 0 2 4 VDS/V 6 8 10 Fig.2. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 5 V Fig.5. Typical output characteristics, Tj = 25 ˚C. ID = f(VDS); parameter VGS RDS(ON)/mOhm 1000 ID/A RDS(ON) = VDS/ID 100 tp = 100uS 11 10 9 VGS/V = 8 1mS 10mS 10 DC 100mS 7 6 5 4 3.0 3.2 3.4 3.6 4.0 5.0 1 3 1 10 VDS/V 100 0 20 40 ID/A 60 80 100 Fig.3. Safe operating area. Tmb = 25 ˚C ID & IDM = f(VDS); IDM single pulse; parameter tp Fig.6. Typical on-state resistance, Tj = 25 ˚C. RDS(ON) = f(ID); parameter VGS August 1999 3 Rev 1.100 Philips Semiconductors Product specification TrenchMOS™ transistor Logic level FET BUK9605-30A 6.5 6 5.5 5 RDS(ON)/mOhm a 2 30V TrenchMOS 1.5 1 4.5 4 3.5 3 0.


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