AT94S10AL

Features Multichip Module Containing Field Programmable System Level Integrated Circuit (FPSLIC®) and Secure Configuration EEPROM Memory 512 Kbits to 1 Mbit of Configuration Memory with Security Protection and In-System Programming (ISP) Field Programmable System Level Integrated Circuit (FPSLIC) – AT40K SRAM-based FPGA with Embedded High-performance RISC AVR® Core and Extensive Data and Instruction SRAM 5,000 to 40,000 Gates of Patented SRAM-based AT40K FPGA with FreeRAM™ – 2 - 18.4 Kbits of Distributed Single/Dual Port FPGA User SRAM – High-performance DSP Optimized FPGA Core Cell – Dynamically Reconfigurable In-System – FPGA Configuration Access Available On-chip from AVR Microcontroller Core to Support Cache Logic® Designs – Very Low Static and Dynamic Power Consumption – Ideal for Portable and Handheld Applications Patented AVR Enhanced RISC Architecture – 120+ Powerful Instructions – Most Single Clock Cycle Execution – High-performance...