Microcontroller. MPC5668G Datasheet

MPC5668G Microcontroller. Datasheet pdf. Equivalent

Part MPC5668G
Description Microcontroller
Feature Because of an order from the United States International Trade Commission, BGA-packaged product line.
Manufacture Freescale Semiconductor
Datasheet
Download MPC5668G Datasheet



MPC5668G
Freescale Semiconductor
Data Sheet: Advance Information
Document Number: MPC5668X
Rev. 3, 9/2009
MPC5668x
MPC5668x Microcontroller
Data Sheet
MAPBGA–208
17 mm x 17 mm
MAPBGA–256
17 mm x 17 mm
MPC5668x features:
• 32-bit CPU core complex (e200z650)
– Compliant with Power Architecture embedded category
– 32 KB unified cache with line locking and eight-entry
store buffer
– Execution speed static to 116 MHz
• 32-bit I/O processor (e200z0)
– Execution speed static to 1/2 CPU core speed (58 MHz)
• 2 MB on-chip flash
– Supports read during program and erase operations, and
multiple blocks allowing EEPROM emulation
• 512 KB + 80 KB (592 KB) on-chip ECC SRAM
(MPC5668G)
• 128 KB on-chip ECC SRAM (MPC5668E)
• 16-entry Memory Protection Unit (MPC5668E only)
• Direct memory access controller
– 16-channel on MPC5668G
– 32-channel on MPC5668E
• Fast ethernet controller
– Supports 10-Mbps and 100-Mbps IEEE 802.3 MII,
10-Mbps 7-wire interface
www.DataSheIEetE4UE.c8o0m2.3 MAC (compliant with IEEE 802.3 1998
edition)
• Media Local Bus (MLB) interface (MPC5668G only)
– Supports 16 logical channels, max speed 1024 Fs
• Interrupt controller (INTC) supports 316 external interrupt
vectors (22 are reserved)
• System clocks
– Frequency-modulated phase-locked loop (FMPLL)
– 4 – 40 MHz crystal oscillator (XTAL)
– 32 kHz crystal oscillator (XTAL)
– Dedicated 16 MHz and 128 kHz internal RC oscillators
• Analog to Digital Converter (ADC) module
– 10-bit A/D resolution
– 32 external channels
– 36 internal channels (MPC5668G)
– 64 internal channels (MPC5668E)
• Cross-Triggering Unit (MPC5668E only)
– Internal conversion triggering for ADC
– Triggerable by internal timers or eMIOS200
• Deserial Serial Peripheral Interface (DSPI)
– Four individual DSPI modules
– Full duplex, synchronous transfers
– Master or slave operation
• Inter-IC communication (I2C) interface
– Four individual I2C modules
– Multi-master operation
• Serial Communication Interface (eSCI) module
– Two-channel DMA interface
– Configurable as LIN bus master
• eMIOS200 timed input/output
– 24 channels, 16-bit timers (MPC5668G)
– 32 channels, 16-bit timers (MPC5668E)
• Controller Area Network (FlexCAN) module
– Compliant with CAN protocol specification, Version
2.0B active
– 64 mailboxes, each configurable as transmit or receive
• Dual-channel FlexRay controller
– Full implementation of FlexRay Protocol Specification
2.1, RevA
– 128 message buffers
• JTAG controller (MPC5668G only)
– Compliant with the IEEE 1149.1-2001
• Nexus Development Interface (NDI)
– Available in 256 MAPBGA package only
– Compliant with IEEE-ISTO 5001-2003
– Nexus class 3 development support on e200z650
– Nexus class 2+ development support on e200z0
• Internal voltage regulator allows operation from single
3.3 V or 5 V supply
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2009. All rights reserved.
Preliminary—Subject to Change Without Notice



MPC5668G
Table of Contents
1 Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
1.1 Orderable Parts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2 MPC5668x Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . .4
3 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
3.1 208-ball MAPBGA Pin Assignments . . . . . . . . . . . . . . . .6
3.2 256-ball MAPBGA Pin Assignments . . . . . . . . . . . . . . . .7
3.3 Pin Muxing and Reset States . . . . . . . . . . . . . . . . . . . . .8
3.3.1 Power and Ground Supply Summary . . . . . . . .25
4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
4.1 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
4.2 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . .27
4.2.1 General Notes for Specifications at Maximum
Junction Temperature . . . . . . . . . . . . . . . . . . . .28
4.3 ESD Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .30
4.4 VRC Electrical Specifications . . . . . . . . . . . . . . . . . . . .30
4.5 DC Electrical Specifications . . . . . . . . . . . . . . . . . . . . .30
4.6 Operating Current Specifications . . . . . . . . . . . . . .32
4.7 I/O Pad Current Specifications . . . . . . . . . . . . . . . . . . .34
4.7.1 I/O Pad VDD33 Current Specifications . . . . . . . .35
4.8 Low Voltage Characteristics . . . . . . . . . . . . . . . . . . . . 36
4.9 Oscillators Electrical Characteristics . . . . . . . . . . . . . . 36
4.10 FMPLL Electrical Characteristics. . . . . . . . . . . . . . . . . 38
4.11 ADC Electrical Characteristics. . . . . . . . . . . . . . . . . . . 39
4.12 Flash Memory Electrical Characteristics . . . . . . . . . . . 39
4.13 Pad AC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . 40
4.14 AC Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
4.14.1 Reset and Boot Configuration Pins . . . . . . . . . 43
4.14.2 External Interrupt (IRQ) and Non-Maskable
Interrupt (NMI) Pins . . . . . . . . . . . . . . . . . . . . . 43
4.14.3 JTAG (IEEE 1149.1) Interface . . . . . . . . . . . . . 44
4.14.4 Nexus Debug Interface. . . . . . . . . . . . . . . . . . . 47
4.14.5 Enhanced Modular I/O Subsystem (eMIOS) . . 49
4.14.6 Deserial Serial Peripheral Interface (DSPI) . . . 50
4.14.7 MLB Interface . . . . . . . . . . . . . . . . . . . . . . . . . . 55
4.14.8 Fast Ethernet Interface . . . . . . . . . . . . . . . . . . 57
5 Package Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
5.1 Package Mechanical Data . . . . . . . . . . . . . . . . . . . . . . 61
6 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Feature
Package
RAM with ECC
MPU
DMA
Ethernet (FEC)
MediaLB (MLB-DIM)
FlexRay
ADC (10-bit)
www.DaTtoatSahleTeitm4Ue.rcIo/Om (eMIOS200)
Cross Trigger Unit (CTU)
SCI (eSCI)
SPI (DSPI)
CAN (FlexCAN)
I2C
Nexus3 Debug (e200Z6)
Nexus2+ Debug (e200Z0)
Table 1. MPC5668G/MPC5668E Comparison
MPC5668G
208 MAPBGA
256 MAPBGA
592 KB
No
16-channel
Yes
Yes
Yes (128 Message Buffers)
36 internal channels
Supports 32 external channels
24 channels, 16-bit
No
6
4
6
4
Supported on 256BGA
— emulation package
MPC5668E
208 MAPBGA
256 MAPBGA
128 KB
16 entry
32-channel
No
No
No
64 internal channels
Supports 32 external channels
32 channels, 16-bit
Yes
12
4
5
4
Supported on 256BGA
— emulation package
MPC5668x Microcontroller Data Sheet, Rev. 3
2 Freescale Semiconductor
Preliminary—Subject to Change Without Notice







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