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512Mb: x32 Automotive Mobile LPDDR2 SDRAM Features1
Automotive Mobile LPDDR2 SDRAM
EDB5432BEBH, EDB5432BEPA
Features1
• Ultra low-voltage core and I/O power supplies – VDD2 = 1.14–1.30V – VDDCA/VDDQ = 1.14–1.30V – VDD1 = 1.70–1.95V
• Clock frequency range – 533–10 MHz (data rate range: 1066–20 Mb/s/pin)
• Four-bit prefetch DDR architecture • Four internal banks for concurrent operation • Multiplexed, double data rate, command/address
inputs; commands entered on every CK edge • Bidirectional/differential data strobe per byte of
data (DQS/DQS#) • Programmable READ and WRITE latencies (RL/WL) • Programmable burst lengths: 4, 8, or 16 • On-chip temperature sensor to control self refresh
rate • Partial-array self refresh (PASR)2 • Deep power-down mode (DPD) • Selectable output drive strength (DS) • Clock stop capability • RoHS-compliant, “green” packaging
Table 1: Key Timing Parameters
Speed Clock Rate Data Rate Grade (MHz) (Mb/s/pin) RL.