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MT42L512M32D4 Dataheets PDF



Part Number MT42L512M32D4
Manufacturers Micron Technology
Logo Micron Technology
Description Mobile LPDDR2 SDRAM
Datasheet MT42L512M32D4 DatasheetMT42L512M32D4 Datasheet (PDF)

4Gb: x16, x32 Mobile LPDDR2 SDRAM S4 Features Mobile LPDDR2 SDRAM MT42L256M16D1, MT42L128M32D1, MT42L256M32D2, MT42L128M64D2, MT42L512M32D4, MT42L192M64D3, MT42L256M64D4, MT42L384M32D3 Features • Ultra low-voltage core and I/O power supplies – VDD2 = 1.14–1.30V – VDDCA/VDDQ = 1.14–1.30V – VDD1 = 1.70–1.95V • Clock frequency range – 533–10 MHz (data rate range: 1066–20 Mb/s/pin) • Four-bit prefetch DDR architecture • Eight internal banks for concurrent operation • Multiplexed, double data rate,.

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4Gb: x16, x32 Mobile LPDDR2 SDRAM S4 Features Mobile LPDDR2 SDRAM MT42L256M16D1, MT42L128M32D1, MT42L256M32D2, MT42L128M64D2, MT42L512M32D4, MT42L192M64D3, MT42L256M64D4, MT42L384M32D3 Features • Ultra low-voltage core and I/O power supplies – VDD2 = 1.14–1.30V – VDDCA/VDDQ = 1.14–1.30V – VDD1 = 1.70–1.95V • Clock frequency range – 533–10 MHz (data rate range: 1066–20 Mb/s/pin) • Four-bit prefetch DDR architecture • Eight internal banks for concurrent operation • Multiplexed, double data rate, command/address inputs; commands entered on every CK edge • Bidirectional/differential data strobe per byte of data (DQS/DQS#) • Programmable READ and WRITE latencies (RL/WL) • Programmable burst lengths: 4, 8, or 16 • Per-bank refresh for concurrent operation • On-chip temperature sensor to control self refresh rate • Partial-array self refresh (PASR) • Deep power-down mode (DPD) • Selectable output drive strength (DS) • Clock stop capability • R.


MT42L128M64D2 MT42L512M32D4 MT42L192M64D3


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