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ispLSI2192VE Dataheets PDF



Part Number ispLSI2192VE
Manufacturers Lattice Semiconductor
Logo Lattice Semiconductor
Description 3.3V In-System Programmable SuperFAST High Density PLD
Datasheet ispLSI2192VE DatasheetispLSI2192VE Datasheet (PDF)

LeadFree Package Options Available! ispLSI® 2192VE 3.3V In-System Programmable SuperFAST™ High Density PLD Features • SuperFAST HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, Nine or Twelve Dedicated Inputs — 192 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc. — Small Logic Block Size for Random Logic — Pinout Compatible with ispLSI 2096V and 2096VE • 3.3V LOW VOLTAGE ARCHITECTURE — Interfaces w.

  ispLSI2192VE   ispLSI2192VE



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LeadFree Package Options Available! ispLSI® 2192VE 3.3V In-System Programmable SuperFAST™ High Density PLD Features • SuperFAST HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, Nine or Twelve Dedicated Inputs — 192 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc. — Small Logic Block Size for Random Logic — Pinout Compatible with ispLSI 2096V and 2096VE • 3.3V LOW VOLTAGE ARCHITECTURE — Interfaces with Standard 5V TTL Devices • HIGH PERFORMANCE E2CMOS® TECHNOLOGY — fmax = 225MHz Maximum Operating Frequency — tpd = 4.0ns Propagation Delay — Electrically Erasable and Reprogrammable — Non-Volatile — 100% Tested at Time of Manufacture — Unused Product Term Shutdown Saves Power • IN-SYSTEM PROGRAMMABLE — 3.3V In-System Programmability (ISP™) Using Boundary Scan Test Access Port (TAP) — Open-Drain Output Option for Flexible Bus Interface Capability, .


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