EDY4016A

DDR4 SDRAM EDY4016A - 256Mb x 16 Features VDD = VDDQ = 1.2V ±60mV VPP = 2.5V, –125mV/+250mV On-die, internal, adjustable VREFDQ generation 1.2V pseudo open-drain I/O TC of 0°C to 95°C – 64ms, 8192-cycle refresh at 0°C to 85°C – 32ms at 85°C to 95°C 8 internal banks: 2 groups of 4 banks each 8n-bit prefetch architecture Programmable data strobe preambles Data strobe preamble training Command/Address latency (CAL) Multipurpose register READ and WRITE capability Write and read leveling Self refresh mode Low-power auto self refresh (LPASR) Temperature controlled refresh (TCR) Fine granularity refresh Self refresh abort Maximum power saving Output driver calibration Nominal, park, and dynamic on-die termination (ODT) Data bus inversion (DBI) for data bus Command/Address (CA) parity 4Gb: x16 DDR4 SDRAM Features Databus write cyclic redundancy check (CRC) Per-DRAM addressability ...