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HD74HC137 Dataheets PDF



Part Number HD74HC137
Manufacturers Renesas
Logo Renesas
Description 3-to-8-line Decoder/Demultiplexer
Datasheet HD74HC137 DatasheetHD74HC137 Datasheet (PDF)

HD74HC137 3-to-8-line Decoder/Demultiplexer with Address Latch REJ03D0569-0200 (Previous ADE-205-443) Rev.2.00 Oct 11, 2005 Description The HD74HC137 implements a three-to-eight line decoder with latches on the three address inputs. When GL goes from low to high, the address present at the select inputs (A, B and C) is stored in the latches. As long as GL remains high no address changes will be recognized. Output enable controls, G1 and G2, control the state of the outputs independently of the .

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HD74HC137 3-to-8-line Decoder/Demultiplexer with Address Latch REJ03D0569-0200 (Previous ADE-205-443) Rev.2.00 Oct 11, 2005 Description The HD74HC137 implements a three-to-eight line decoder with latches on the three address inputs. When GL goes from low to high, the address present at the select inputs (A, B and C) is stored in the latches. As long as GL remains high no address changes will be recognized. Output enable controls, G1 and G2, control the state of the outputs independently of the select or latch-enable inputs. All of the outputs are high unless G1 is high and G2 is low. The HD74HC137 is ideally suited for the implementation of glitchfree decoders in stored-address applications in bus oriented systems. Features • High Speed Operation: tpd (A, B, C to Y) = 16.5 ns typ (CL = 50 pF) • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: VCC = 2 V to 6 V • Low Input Current: 1 µA max • Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta .


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