8-bit Address Latch
This 8-bit addressable latch is designed for general purpose storage applications in digital systems. Specific uses
include working registers, serial-holding registers, and active-high decoders or demultiplexers. This is multifunctional
device capable of storing single-line data in eight addressable latches, and being a 1-to-8 decoder or demultiplexer with
Four distinct modes of operation are selectable by controlling the clear and enable inputs as enumerated in the function
table. In the addressable-latch mode, data at the data-in terminal is written into the addressed latch.
The addressed latch will follow the data input with all unaddressed latches remaining in their previous states. In the
memory mode, latch remains in their previous states and is unaffected by the data or address inputs.
To eliminate the possibility of entering erroneous data in the latch, the enable should be held high (inactive) while the
address lines are changing.
In the clear mode, all outputs are low and unaffected by the address and data inputs.
• Ordering Information
HD74LS259FPEL SOP-16 pin (JEITA)
HD74LS259RPEL SOP-16 pin (JEDEC)
Note: Please consult the sales office for the above package availability.
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
Rev.2.00, Feb.18.2005, page 1 of 7