Document
HD74LS40
Dual 4-input Positive NAND Buffers
Features
• Ordering Information
Part Name
Package Type
Package Code (Previous Code)
Package Abbreviation
HD74LS40FPEL SOP-14 pin (JEITA)
PRSP0014DF-B (FP-14DAV)
FP
Note: Please consult the sales office for the above package availability.
Pin Arrangement
REJ03D0408–0200 Rev.2.00
Feb.18.2005
Taping Abbreviation (Quantity) EL (2,000 pcs/reel)
1A 1 1B 2 NC 3 1C 4 1D 5 1Y 6 GND 7
(Top view)
14 VCC 13 2D 12 2C 11 NC 10 2B 9 2A 8 2Y
Rev.2.00, Feb.18.2005, page 1 of 4
HD74LS40
Circuit Schematic (1/2)
Inputs A B C D
17k 3k
VCC 25
4k 750 1.5k
Output Y
GND
Absolute Maximum Ratings
Item
Symbol
Ratings
Supply voltage
VCC
7
Input voltage
VIN 7
Power dissipation
PT 400
Storage temperature
Tstg –65 to +150
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.
Recommended Operating Conditions
Item Supply voltage
Output current
Operating temperature
Symbol VCC IOH IOL Topr
Min 4.7.