Synchronous 4-bit Binary Counter (Direct Clear)
(Previous ADE-205-264B (Z))
Jun. 04, 2004
The HD74LV161A is 4-bit binary counters. All flip flops are clocked simultaneously on the low to high to transition
(positive edge) of the clock input waveform. These counters may be preset using the load input. Presetting of all four
flip flops is synchronous to the rising edge of clock. When load is held low counting is disabled and the data on the A,
B, C and D inputs is loaded into the counter on the rising edge clock. If the load input is taken high before the positive
edge of clock, the count operation will be unaffected.
Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the
low-power consumption extends the battery life.
• VCC = 2.0 V to 5.5 V operation
• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
• All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)
• Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
• Ordering Information
SOP–16 pin(JEITA) FP–16DAV
SOP–16 pin(JEDEC) FP–16DNV
Note: Please consult the sales office for the above package availability.
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
ELL (2,000 pcs/reel)
Rev.4.00 Jun. 04, 2004 page 1 of 15