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HD74LV4040A Dataheets PDF



Part Number HD74LV4040A
Manufacturers Renesas
Logo Renesas
Description 12-stage Binary Counter
Datasheet HD74LV4040A DatasheetHD74LV4040A Datasheet (PDF)

HD74LV4040A 12-stage Binary Counter REJ03D0337–0200Z (Previous ADE-205-282 (Z)) Rev.2.00 Jul. 20, 2004 Description The HD74LV4040A is a 12 stage counter. This device is incremented on the falling edge (negative transition) of the input clock, and all its output is reset to a low level by applying a logical high on its reset input. Low-voltage and highspeed operation is suitable for the battery-powered products (e.g., notebook computers), and the low-power consumption extends the battery life..

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HD74LV4040A 12-stage Binary Counter REJ03D0337–0200Z (Previous ADE-205-282 (Z)) Rev.2.00 Jul. 20, 2004 Description The HD74LV4040A is a 12 stage counter. This device is incremented on the falling edge (negative transition) of the input clock, and all its output is reset to a low level by applying a logical high on its reset input. Low-voltage and highspeed operation is suitable for the battery-powered products (e.g., notebook computers), and the low-power consumption extends the battery life. Features • VCC = 2.0 V to 5.5 V operation • All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) • All outputs VO (Max.) = 5.5 V (@VCC = 0 V) • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C) • Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V) • Ordering Information Part Name Package Type Package Code Package Abbreviation HD74LV4040AFPEL SOP–16 pin (JEITA) FP–16.


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