Octal D-type Flip Flops with 3-state Outputs
(Previous ADE-205-117B (Z))
Jul. 29, 2004
The HD74LVC574A has eight edge trigger D type flip flops with three state outputs in a 20 pin package. Data at the D
inputs meeting set up requirements are transferred to the Q outputs on positive going transitions of the clock input.
When the clock input goes low, data at the D inputs will be retained at the outputs until clock input returns high again.
When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of
what signals are present at the other inputs and the state of the storage elements. Low voltage and high-speed operation
is suitable at the battery drive product (note type personal computer) and low power consumption extends the life of a
battery for long time operation.
• VCC = 2.0 V to 5.5 V
• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
• All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state)
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• High output current ±24 mA (@VCC = 3.0 V to 5.5 V)
• Ordering Information
SOP–20 pin (JEITA) FP–20DAV
Note: Please consult the sales office for the above package availability.
EL (2,000 pcs/reel)
ELL (2,000 pcs/reel)
OC CK D
H: High level
L: Low level
Z: High impedance
↑ : Low to high transition
Q0: Level of Q before the indicated steady input conditions were established.
Rev.4.00 Jul. 29, 2004 page 1 of 7