HD74HC4024

HD74HC4024 7-stage Binary Counter REJ03D0325-0300 Rev.3.00 Mar 30, 2006 Description The HD74HC4024 is a 7-stage counter. This device is incremented on the falling edge (negative transition) of the input clock, and all its output is reset to a low level by applying a logical high on its reset input. Features High Speed Operation: tpd (Clock to Q1) = 14 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74HC4024P DILP-14 pin PRDP0014AB-B (DP-14AV) P HD74HC4024FPEL SOP-14 pin (JEITA) PRSP0014DF-B (FP-14DAV) FP HD74HC4024RPEL SOP-14 pin (JEDEC) PRSP0014DE-A (FP-14DNV) RP Note: Please consult the sales office for the above package availability. Taping Abbreviation (Quantity) — EL (2,000 pcs/reel) EL (2,5...