Document
IS24C32A/B IS24C64A/B
ISSI®
65,536 bit/32,768 bit 2-WIRE SERIAL CMOS EEPROM
ADVANCED INFORMATION MAY 2004
FEATURES
• Two-Wire Serial Interface –Bi-directional data transfer protocol
• 400 KHz (I2C Protocol) Compatibility • Low Power CMOS Technology
–Standby Current less than 6 µA (5.0V) –Read Current less than 2 mA (5.0V) –Write Current less than 3 mA (5.0V) • Flexible Voltage Operation –Vcc = 1.8V to 5.5V for –2 version –Vcc = 2.5V to 5.5V for –3 version • Hardware Data Protection –IS24C32A/64A: WP protects entire array –IS24C32B/64B: WP protects top quarter of
array • Sequential Read Feature • Filtered Inputs for Noise Suppression • 8-pin PDIP, 8-pin SOIC and 8-pin TSSOP
packages • Self time write cycle with auto clear
5 ms @ 2.5V • Organization:
–IS24C32A/B: 4Kx8 (128 pages of 32 bytes) –IS24C64A/B: 8Kx8 (256 pages of 32 bytes) • 32 Byte Page Write Buffer • High Reliability –Endurance: 1,000,000 Cycles –Data Retention: 100 Ye.