MAX1920/MAX1921

Low-Voltage, 400mA Step-Down

DC-DC Converters in SOT23

Table 3. Component Suppliers

SUPPLIER

Coilcraft

Kemet

Murata

USA

Sumida

Japan

Taiyo

Yuden

USA

Japan

Toko

USA

Japan

PHONE

847-639-6400

408-986-0424

814-237-1431

847-956-0666

81-3-3607-5111

408-573-4150

81-3-3833-5441

847-297-0070

81-3-3727-1161

WEBSITE

www.coilcraft.com

www.kemet.com

www.murata.com

www.sumida.com

www.T-Yuden.com

www.yuden.co.jp

www.tokoam.com

www.toko.co.jp

MAX1921 Using Ceramic COUT

When using the application circuit of Figure 1, the induc-

tor’s series resistance causes a small amount of load

regulation, as desired for a voltage-positioning load tran-

sient response. Choose R1 such that VOUT is high at no

load by about half of this load regulation. The simplified

calculation is:

R1 = 5 x 104 x RL(MAX)

where RL(MAX) is the maximum series resistance of the

inductor. Select a standard resistor value that is within

20% of this calculation.

Next, calculate CFF for 25mV ripple at the internal feed-

back node. The simplified calculation is:

CFF = 2.5 × 10-5/R1

where R1 is the standard resistor value that is used.

Select a standard capacitor value that is within 20% of

the calculated CFF.

INPUT

2V TO 5.5V

CIN

1

IN

6

LX

MAX1920

2 AGND

PGND 5

L

ON

OFF

3

SHDN

4

FB

OUTPUT

UP TO 400mA

COUT

R1

R2

Figure 4. MAX1920 Application Circuit Using Tantalum Output

Capacitor

MAX1920 Using Ceramic COUT

When using the application circuit of Figure 2, the induc-

tor’s series resistance causes a small amount of load reg-

ulation, as desired for a voltage-positioning load transient

response. Choose R1 and R2 such that VOUT is high at

no load by about half of this load regulation:

R1

=R 2 × VOUT + RL V×RIOEFUT ( MAX

)

/

2

−

1

where R2 is chosen in the 50kΩ to 500kΩ range, VREF

= 1.25V and RL is the typical series resistance of the

inductor. Use 1% or better resistors.

Next, calculate the equivalent resistance at the FB node as:

=Req R=1|| R 2 R1× R 2

R1+ R2

Then, calculate CFF for 25mV ripple at FB. The simplified

calculation is:

CFF = 2.5 × 10-5/Req

Select a standard capacitor value that is within 20% of the

calculated CFF.

MAX1920 Using Tantalum COUT

When using the application circuit of Figure 4, choose R1

and R2 such as to obtain the desired VOUT:

R1

=R 2 ×

VOUT

VREF

− 1

where R2 is chosen to be less than 50kΩ and VREF =

1.25V. Use 1% or better resistors.

Layout Considerations

High switching frequencies make PC board layout a very

important part of design. Good design minimizes exces-

sive EMI on the feedback paths and voltage gradients in

the ground plane, both of which can result in instability or

regulation errors. Connect the inductor, input filter capacitor,

and output filter capacitor as close to the device as possible,

and keep their traces short, direct, and wide. Connect their

ground pins at a single common node in a star ground con-

figuration. The external voltage-feedback network should

be very close to the FB pin, within 0.2in (5mm). Keep

noisy traces, such as the LX trace, away from the voltage-

feedback network; also keep them separate, using grounded

copper. The MAX1920/MAX1921 evaluation kit data sheet

includes a proper PC board layout and routing scheme.

www.maximintegrated.com

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