Differential LVPECL/LVECL/HSTL Receiver/Drivers
MAX9321/MAX9321A
19-2152; Rev 2; 11/02
Differential LVPECL/LVECL/HSTL Receiver/Drivers
General Description
The MAX932...
Description
MAX9321/MAX9321A
19-2152; Rev 2; 11/02
Differential LVPECL/LVECL/HSTL Receiver/Drivers
General Description
The MAX9321/MAX9321A are low-skew differential receiver/drivers designed for clock and data distribution. The differential input can be adapted to accept a single-ended input by connecting the on-chip VBB supply to an input as a reference voltage.
The MAX9321/MAX9321A feature ultra-low propagation delay (172ps) and part-to-part skew (20ps) with 24mA maximum supply current, making these devices ideal for clock buffering or repeating. For interfacing to differential HSTL and LVPECL signals, these devices operate over a +2.25V to +3.8V supply range, allowing high-performance clock and data distribution in systems with a nominal +2.5V or +3.3V supply. For differential LVECL operation, these devices operate from a -2.25V to -3.8V supply. Multiple pinouts are provided to simplify routing across a backplane to either side of a double-sided board.
Both devices are offered in space-savi...
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