BSH104

DISCRETE SEMICONDUCTORS DATA SHEET book, halfpage M3D088 BSH104 N-channel enhancement mode MOS transistor Objective specification File under Discrete Semiconductors, SC13b 1997 Nov 26 Philips Semiconductors Objective specification N-channel enhancement mode MOS transistor FEATURES High-speed switching No secondary breakdown Direct interface to C-MOS, TTL, etc. Very low threshold. APPLICATIONS ‘Glue-logic’: interface between logic blocks and/or periphery Power management DC to DC converters General purpose switch Battery powered applications. DESCRIPTION N-channel enhancement mode MOS transistor in a SOT23 SMD package. CAUTION The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling. QUICK REFERENCE DATA SYMBOL VDS VSD VGS VGSth ID RDSon Ptot PARAMETER drain-source voltage (DC) source-drain diode forward voltage gate-source voltage (DC) gate-source threshold voltage drain current (DC) drain-source on-state resistance total power dissipation VDS = VGS ; ID = 1 mA Ts = 80 °C VGS = 2.5 V; ID = 0.65 A Ts = 80 °C VGD = 0; IS = 0.5 A CONDITIONS − − − 0.4 − − − MIN. 1 ±8 − 1.1 0.3 0.5 1 Top view 2 MAM273 BSH104 PINNING PIN 1 2 3 SYMBOL g s d gate source drain DESCRIPTION handbook, halfpage 3 d g s Fig.1 Simplified outline (SOT23) and symbol. MAX. 12 V V V V A Ω UNIT W 1997 Nov 26 2 Philips Semiconductors Objective specification N-channel enhancement mode MOS trans...