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BSP220

NXP

P-channel enhancement mode vertical D-MOS transistor

DISCRETE SEMICONDUCTORS DATA SHEET BSP220 P-channel enhancement mode vertical D-MOS transistor Product specification Fi...


NXP

BSP220

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DISCRETE SEMICONDUCTORS DATA SHEET BSP220 P-channel enhancement mode vertical D-MOS transistor Product specification File under Discrete Semiconductors, SC13b April 1995 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor FEATURES Low RDS(on) Direct interface to C-MOS, TTL, etc. High-speed switching No secondary breakdown. DESCRIPTION P-channel enhancement mode vertical D-MOS transistor in a miniature SOT223 envelope and intended for use in relay, high-speed and line transformer drivers. PINNING - SOT223 PIN 1 2 3 4 gate drain source drain 1 Top view 2 3 MAM121 BSP220 QUICK REFERENCE DATA SYMBOL −VDS −ID RDS(on) −VGS(th) PARAMETER drain-source voltage drain current drain-source on-resistance gate-source threshold voltage DC value −ID = 200 mA −VGS = 10 V CONDITIONS MAX. UNIT 200 225 12 2.8 V mA Ω V PIN CONFIGURATION handbook, halfpage 4 d DESCRIPTION g s Fig.1 Simplified outline and symbol. April 1995 2 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor LIMITING VALUES In accordance with the Absolute Maximum System (IEC 134). SYMBOL −VDS ±VGSO −ID −IDM Ptot Tstg Tj Note PARAMETER drain-source voltage gate-source voltage drain current drain current total power dissipation storage temperature range junction temperature open drain DC value peak value up to Tamb = 25 °C (note 1) CONDITIONS MIN. − − − − − −65 − BSP220 MAX. 200 20 225 600 1.5 150 150 UNIT V V mA m...




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