SINGLE-CHIP MICROCOMPUTER. UPD75518A Datasheet

UPD75518A MICROCOMPUTER. Datasheet pdf. Equivalent

UPD75518A Datasheet
Recommendation UPD75518A Datasheet
Part UPD75518A
Description 4 BIT SINGLE-CHIP MICROCOMPUTER
Feature UPD75518A; ELECTRON DEVICE DATA SHEET MOS INTEGRATED CIRCUIT µPD75518(A) 4 BIT SINGLE-CHIP MICROCOMPUTER The .
Manufacture NEC
Datasheet
Download UPD75518A Datasheet




NEC UPD75518A
ELECTRON DEVICE
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD75518(A)
4 BIT SINGLE-CHIP MICROCOMPUTER
The µPD75518(A) is a 75X series four-bit single-chip microcomputer which enables data processing
equivalent to that performed by an eight-bit microcomputer. It is a high-performance product, whose
minimum instruction execution time is 0.67 µs, shorter than 0.95 µs for the conventional µPD75516. The ROM
and RAM capacities are also larger, and the throughput of the 75X series is further increased. The µPD75517(A)
is suited to controllers of electric parts of automobiles.
FEATURES
Higher reliable than the µPD75518
Capacities of program memory, ROM: 32640 × 8 bits
Capacity of data memory, RAM: 1024 × 4 bits
Function for specifying the instruction execution time (useful for high-speed operation and saving power)
• 0.67 µs/1.33 µs/2.67 µs/10.7 µs (when the main system clock operates at 6.0 MHz)
• 0.95 µs/1.91 µs/3.82 µs/15.3 µs (when the main system clock operates at 4.19 MHz)
• 122 µs (when the subsystem clock operates at 32.768 kHz)
Built-in A/D converter operable on low voltage
• 8-bit resolution × 8 channels (Successive approximation system)
• VDD = 2.7 to 6.0 V
Many I/O lines: 64
Enhanced timer function: 4 channels
Built-in 8-bit serial interface: Two channels
• Built-in NEC serial bus interface (SBI)
Clock operable with ultra-low power consumption (when 5-µA TYP. operates on 3 V.)
Product with a built-in PROM available: µPD75P518
APPLICATIONS
Controller of electric parts of automobiles
ORDERING INFORMATION
Part number
µPD75518GF(A)-×××-3B9
Package
80-pin plastic QFP (14 mm × 20 mm)
Quality grade
Special
Remark ×××: Code number
Please refer to “Quality Grade on NEC Semiconductor Devices” (Document number IEI-1209) published by NEC
Corporation to know the specification of quality grade on the devices and its recommended applications.
Document No.
(O.D. No.
IC-3191
IC-8684)
Date Published December 1992 P
Printed in Japan
The information in this document is subject to change without notice.
NEC CORPORATION 1992



NEC UPD75518A
µPD75518(A)
FUNCTIONS
Item
Functions
Built-in memory ROM
32640 × 8 bits
RAM
1024 × 4 bits
General registers
(4-bit × 8 or 8-bit × 4) × 4 banks
Instruction cycle
• 0.67 µs/1.33 µs/2.67 µs/10.7 µs (At 6.0 MHz)
• 0.95 µs/1.91 µs/3.82 µs/15.3 µs (At 4.19 MHz)
• 122 µs (At 32.768 kHz)
I/O ports Total
64
Number of CMOS
input lines
16 (Shared with INT, SIO, PPO, and analog input. Seven lines can be pulled
up by software.)
Number of CMOS
I/O lines
28 (Four lines for LED driving)
• 16 lines can be pulled up by software.
• Four lines can be pulled down by the mask option.
Number of N-ch
20 (Eight lines for LED driving. Withstand voltage is 10 V. 20 lines can be
open-drain I/O lines
pulled up by the mask option.)
A/D converter
8-bit resolution × 8 channels (Successive approximation system)
• Capable of low-voltage operation: VDD = 2.7 to 6.0 V
Timer/counter
Four channels
• Timer/event counter
• Basic interval timer
• Timer/pulse generator (14-bit PWM output enabled)
• Clock timer
Serial interface
Two channels
• NEC standard serial bus interface (SBI)/
three-wire SIO: One channel
• General clock synchronous serial interface
(three-wire SIO): One channel
Interrupt
• Vectored interrupt : Seven sources (External: 3, internal: 4)
• Test input
: Two sources (External: 1, internal: 1)
• Clock test flag is provided.
• Parallel edge detection flag for key scan input is provided.
Instruction set
• Set/reset/test/Boolean operation for bit data
• 4-bit data transfer, arithmetic/logical, increment/decrement, and comparison
instructions
• 8-bit data transfer, arithmetic/logical, increment/decrement, and comparison
instructions
System clock generator
• Ceramic/crystal oscillator for main system clock : 6.0 MHz, 4.19 MHz
• Crystal oscillator for subsystem clock
: 32.768 kHz
Operating supply voltage
VDD = 2.7 to 6.0 V
Package
80-pin plastic QFP (14 × 20 mm)
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NEC UPD75518A
PIN CONFIGURATION (TOP VIEW)
µPD75518(A)
AN0
AVREF
VDD
Note
VDD
P113
P112
P111
P110
P103
P102
P101
P100
P93
P92
P91
P90
SI1/P83
SO1/P82
SCK1/P81
PPO/P80
KR7/P73
KR6/P72
KR5/P71
KR4/P70
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
1 64
2 63
3 62
4 61
5 60
6 59
7 58
8 57
9 56
10 55
11 54
12 53
13 52
14 51
15 50
16 49
17 48
18 47
19 46
20 45
21 44
22 43
23 42
24 41
25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
P140
P141
P142
P143
RESET
X2
X1
IC
XT2
XT1
VSS
P00/INT4
P01/SCK0
P02/SO0/SB0
P03/SI0/SB1
P10/INT0
P11/INT1
P12/INT2
P13/ TI0
P20/PTO0
P21
P22/PCL
P23/BUZ
P30
IC: Internally connected. Connect the IC pin to VSS.
Note Be sure to supply power to both the VDD pins.
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