BSS100

September 1996 BSS100 / BSS123 N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process has been especially tailored to minimize on-state resistance, provide superior switching performance. This product is particularly suited to low voltage, low current applications, such as small servo motor controls, power MOSFET gate drivers, and other switching applications. Features BSS100: 0.22A, 100V. RDS(ON) = 6Ω @ VGS = 10V. BSS123: 0.17A, 100V. RDS(ON) = 6Ω @ VGS = 10V High density cell design for extremely low RDS(ON). Voltage controlled small signal switch. Rugged and reliable. _______________________________________________________________________________ D G BSS100 BSS123 S Absolute Maximum Ratings Symbol Parameter TA = 25°C unless otherwise noted BSS100 BSS123 Units VDSS VDGR VGSS Drain-Source Voltage Drain-Gate Voltage (RGS < 20KΩ) Gate-Source Voltage - Continuous - Non Repetitive (TP < 50 µS) 100 100 ± 14 ± 20 0.22 0.9 0.63 -55 to 150 300 0.17 0.68 0.36 V V V ID PD TJ,TSTG TL Drain Current - Continuous - Pulsed Total Power Dissipation @ TA = 25°C Operating and Storage Temperature Range Maximum Lead Temperature for Soldering Purposes, 1/16" from Case for 10 Seconds Thermal Resistacne, Junction-to-Ambient A W °C °C THERMAL CHARACTERISTICS RθJA 20...