CMOS SRAM. UT621024 Datasheet

UT621024 SRAM. Datasheet pdf. Equivalent

UT621024 Datasheet
Recommendation UT621024 Datasheet
Part UT621024
Description 128K x 8 BIT LOW POWER CMOS SRAM
Feature UT621024;  UTRON Rev. 1.6 UT621024 128K X 8 BIT LOW POWER CMOS SRAM REVISION HISTORY REVISION REV. 1.0 RE.
Manufacture Utron
Datasheet
Download UT621024 Datasheet




Utron UT621024
UTRON
Rev. 1.6
UT621024
128K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY
REVISION
REV. 1.0
REV. 1.1
REV. 1.2
REV. 1.3
REV. 1.4
REV. 1.5
REV. 1.6
DESCRIPTION
Original.
NA
NA
Add STSOP-I Package
Modify the format of power consumption
1. Operating : 60/40 -> 60/50/40
2. Standby Current : 10 ->2 (L-version)
3. Add ICC–data as (-55, TYP 50, MAX 85)
4. Revise ISB1 TYP : 10-> 2, MAX : 300/100 ->100/40
5. The symbols CE1# ,OE# & WE# are revised as CE , OE &
Add order information for lead free product
DATE
Apr.05 2000
--
--
Aug.29.2000
Sep.01.2000
Jun.18,2001
May.15,2003
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
1
P80036



Utron UT621024
UTRON
Rev. 1.6
FEATURES
„ Access time : 35/55/70ns (max.)
„ Low power consumption :
Operating : 60/50/40 mA (typical)
Standby : 2µA (typical) L-version
1µA (typical) LL-version
„ Single 5V power supply
„ All inputs and outputs TTL compatible
„ Fully static operation
„ Three state outputs
„ Data retention voltage : 2V (min.)
„ Package : 32-pin 600 mil PDIP
32-pin 450 mil SOP
32-pin 8mmx20mm TSOP-1
32-pin 8mmx13.4mm STSOP
UT621024
128K X 8 BIT LOW POWER CMOS SRAM
GENERAL DESCRIPTION
The UT621024 is a 1,048,576-bit low power CMOS
static random access memory organized as
131,072 words by 8 bits. It is fabricated using high
performance, high reliability CMOS technology.
The UT621024 is designed for low power
application. It is particularly well suited for battery
back-up nonvolatile memory application.
The UT621024 operates from a single 5V power
supply and all inputs and outputs are fully TTL
compatible.
PIN CONFIGURATION
FUNCTIONAL BLOCK DIAGRAM
A0-A16
Vcc
Vss
DECODER
1024 X 1024
MEMORY
ARRAY
I/O1-I/O8
I/O DATA
CIRCUIT
COLUMN I/O
NC 1
A16 2
A14 3
A12 4
A7 5
A6 6
A5 7
A4 8
A3 9
A2 10
A1 11
A0 12
I/O1 13
I/O2 14
I/O3 15
Vss 16
32 Vcc
31 A15
30 CE2
29 WE
28 A13
27 A8
26 A9
25 A11
24 OE
23 A10
22 CE
21 I/O8
20 I/O7
19 I/O6
18 I/O5
17 I/O4
CE
CE2
OE
WE
CONTROL
CIRCUIT
PIN DESCRIPTION
SYMBOL
A0 - A16
I/O1 - I/O8
CE ,CE2
VCC
VSS
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip enable 1,2 Inputs
Write Enable Input
Output Enable Input
Power Supply
Ground
No Connection
A11
A9
A8
A13
WE
CE2
A15
Vcc
NC
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PDIP / SOP
UT621024
TSOP-I/STSOP
32 OE
31 A10
30 CE
29 I/O8
28 I/O7
27 I/O6
26 I/O5
25 I/O4
24 Vss
23 I/O3
22 I/O2
21 I/O1
20 A0
19 A1
18 A2
17 A3
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
2
P80036



Utron UT621024
UTRON
Rev. 1.6
UT621024
128K X 8 BIT LOW POWER CMOS SRAM
ABSOLUTE MAXIMUM RATINGS*
PARAMETER
SYMBOL
RATING
UNIT
Terminal Voltage with Respect to Vss
Operating Temperature
VTERM
TA
-0.5 to +7.0
0 to +70
V
Storage Temperature
TSTG
-65 to +150
Power Dissipation
DC Output Current
Soldering Temperature (under 10 sec)
PD
IOUT
Tsolder
1
50
260
W
mA
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TRUTH TABLE
MODE
CE
Standby
H
Standby
X
Output Disable
L
Read
L
Write
L
Note: H = VIH, L=VIL, X = Don't care.
CE2
X
L
H
H
H
X
X
H
L
X
WE I/O OPERATION
SUPPLY CURRENT
X High - Z
ISB,ISB1
X High -Z
ISB,ISB1
H High - Z
ICC
H DOUT
ICC
L DIN
ICC
DC ELECTRICAL CHARACTERISTICS (VCC = 5V 10%, TA = 0
PARAMETER
Input High Voltage
Input Low Voltage
SYMBOL TEST CONDITION
VIH*1
VIL*2
Input Leakage Current IIL
VSS VIN VCC
Output Leakage Current IOL
VSS VI/O VCC
CE =VIH or CE2 = VIL or
MIN.
2.2
- 0.5
-1
-1
Output High Voltage
Output Low Voltage
Average Operating
Power Supply Courrent
VOH
VOL
ICC
ICC1
Standby Power
Supply Current
ISB
ISB1
= VIH or
= VIL
IOH = - 1mA
IOL= 4mA
Cycle time=min, 100% duty,
-35
CE =VIL, CE2 = VIH,
-55
II/O = 0mA
-70
Cycle time=1µs,100% duty,II/O=0mA
. CE 0.2V,CE2 VCC-0.2V,
other pins at 0.2V or VCC-0.2V,
CE =VIH or CE2 = VIL
other pins at 0.2V or VCC-0.2V,
CE VCC-0.2V or
.CE2 0.2V
other pins at 0.2V or VCC-0.2V,
-L
-
LL
2.4
-
-
-
-
-
-
-
-
Notes:
1. Overshoot : Vcc+2.0v for pulse width less than 10ns.
2. Undershoot : Vss-2.0v for pulse width less than 10ns.
3. Overshoot and Undershoot are sampled, not 100% tested.
4. Those parameters are for reference only under 50
to 70
TYP.
-
-
-
-
-
-
60
50
40
-
-
2
1
)
MAX.
VCC+0.5
0.8
1
1
-
0.4
100
85
70
10
3
100
40*4
50
15*4
UNIT
V
V
µA
µA
V
V
mA
mA
mA
mA
mA
µA
µA
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
3
P80036







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)