CMOS Gate Array
Core Logic
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$0,+* PLFURQ &026 *DWH $UUD\
Description AA4x is a family of 4-input gates which perform the l...
Description
Core Logic
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$0,+* PLFURQ &026 *DWH $UUD\
Description AA4x is a family of 4-input gates which perform the logical AND function.
Logic Symbol
Truth Table
AA4x
A
B C
Q
D
A
B C
Q
D
A B CDQ LXXXL XLXXL XXLXL XXXL L HHHHH
HDL Syntax Verilog .................... AA4x inst_name (Q, A, B, C, D); VHDL...................... inst_name: AA4x port map (Q, A, B, C, D);
Pin Loading
Pin Name
A B C D
AA41 1.0 1.0 1.0 1.0
Equivalent Loads
AA42
AA44
1.0 3.1
1.0 3.1
1.0 3.1
1.0 3.1
AA46 3.1 3.1 3.1 3.1
Size And Power Characteristics
Power Characteristicsa
Cell Equivalent Gates
Static IDD (TJ = 85°C) (nA)
EQLpd (Eq-load)
AA41
3.0
TBD
4.1
AA42
3.0
TBD
5.2
AA44
8.0
TBD
11.3
AA46
9.0
TBD
15.7
a. See page 2-15 for power equation.
3-5
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$0,+* PLFURQ &026 *DWH $UUD\
Propagation Delays (ns)
Conditions: TJ = 25°C, VDD = 5.0V, Typical Process
AA41
Number of Equivalent Loads
From: Any Input To: Q
tPLH tPHL
Number of Equivalent Loads
1
0....
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