Document
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Description AN6x is a family of AND-NOR circuits consisting of two 3-input AND gates into a 2-input NOR gate.
Logic Symbol
Truth Table
A
AN6x
A BCDE FQ
B HHHXXX L
C Q XXXHHHL
D E
All other combinations
H
F
Core Logic
HDL Syntax Verilog .................... AN6x inst_name (Q, A, B, C, D, E, F); VHDL...................... inst_name: AN6x port map (Q, A, B, C, D, E, F);
Pin Loading
Pin Name
A B C D E F
AN62 1.0 1.0 1.0 1.0 1.0 1.0
Equivalent Loads AN64 1.0 1.0 1.0 1.0 1.0 1.0
AN66 2.1 2.1 2.1 2.1 2.1 2.1
Size And Power Characteristics
Power Characteristicsa
Cell Equivalent Gates
Static IDD (TJ = 85°C) (nA)
EQLpd (Eq-load)
AN62
5.0
TBD
8.8
AN64
6.0
TBD
10.1
AN66
12.0
TBD
19.5
a. See page 2-15 for power equation.
3-17
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Propagation Delays (ns)
Conditions: TJ = 25°C, VDD = 5.0V, Typical Process
Number of Equivalent Loads
1
4
AN62
From: Any Input To: Q
tPLH tPHL.