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Description ANBx is a family of AND-NOR circuits consisting of three 2-input AND gates into a 3-input NOR gate.
Logic Symbol
Truth Table
A
ANBx
A BCDE FQ
B HHXXXX L
C Q XXHHXX L D
X X X XHH L
E
All other combinations
H
F
Core Logic
HDL Syntax Verilog .................... ANBx inst_name (Q, A, B, C, D, E, F); VHDL...................... inst_name: ANBx port map (Q, A, B, C, D, E, F);
Pin Loading
Pin Name
A B C D E F
ANB2 1.0 1.0 1.0 1.0 1.0 1.0
Equivalent Loads ANB4 1.0 1.0 1.0 1.0 1.0 1.0
ANB6 2.1 2.1 2.1 2.1 2.1 2.1
Size And Power Characteristics
Size And Power Characteristicsa
Cell Equivalent Gates
Static IDD (TJ = 85°C) (nA)
EQLpd (Eq-load)
ANB2
5.0
TBD
10.3
ANB4
6.0
TBD
10.3
ANB6
12.0
TBD
20.9
a. See page 2-15 for power equation.
3-27
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Propagation Delays (ns)
Conditions: TJ = 25°C, VDD = 5.0V, Typical Process
Number of Equivalent Loads
1
4
ANB2
From: A.