CMOS Gate Array
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$0,+* PLFURQ &026 *DWH $UUD\
Description
ANCx is a family of AND-NOR circuits consisting of one 3-input AN...
Description
$1&[
®
$0,+* PLFURQ &026 *DWH $UUD\
Description
ANCx is a family of AND-NOR circuits consisting of one 3-input AND gate and two 2-input AND gates into a 3-input NOR gate.
Logic Symbol
Truth Table
A B
ANCx
A BCDE FGQ
C HHHXXXX L
D Q XXXHHXX L
E
X X X X XHH L
F
All other combinations
H
G
Core Logic
HDL Syntax Verilog .................... ANCx inst_name (Q, A, B, C, D, E, F, G); VHDL...................... inst_name: ANCx port map (Q, A, B, C, D, E, F, G);
Pin Loading
Pin Name
A B C D E F G
ANC2 1.0 1.0 1.0 1.0 1.0 1.0 1.0
Equivalent Loads ANC4 1.0 1.0 1.0 1.0 1.0 1.0 1.0
ANC6 2.1 2.1 2.1 2.1 2.1 2.1 2.1
Size And Power Characteristics
Size And Power Characteristicsa
Cell Equivalent Gates
Static IDD (TJ = 85°C) (nA)
EQLpd (Eq-load)
ANC2
6.0
TBD
11.4
ANC4
7.0
TBD
12.5
ANC6
12.0
TBD
21.1
a. See page 2-15 for power equation.
3-29
$1&[
®
$0,+* PLFURQ &026 *DWH $UUD\
Propagation Delays (ns)
Conditions: TJ = 25°C, VDD = 5.0V, Typical Proces...
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