CMOS Gate Array
,'&5
$0,+* PLFURQ &026 *DWH $UUD\
Description IDCR0 is a non-buffered, resistive analog interface input piece wi...
Description
,'&5
$0,+* PLFURQ &026 *DWH $UUD\
Description IDCR0 is a non-buffered, resistive analog interface input piece with ESD protection.
Logic Symbol
Truth Table
Pin Loading
IDCR0
QC P PADM D
PADM QC LL HH
PADM
Load 4.90 pF
®
HDL Syntax Verilog .................... IDCR0 inst_name (QC, PADM); VHDL...................... inst_name: IDCR0 port map (QC, PADM);
Power Characteristics
Parameter
Value
Units
Static IDD (TJ = 85°C)
TBD
nA
EQLpd
2.1 Eq-load
See page 2-15 for power equation. Note: This special purpose, “resistive input” pad is not intended for use as a general input pad.
Pad Logic
4-2
...
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