IDPX3

,'3; ® $0,+*  PLFURQ &026 *DWH $UUD\ Description IDPX3 is a non-inverting, PCI-level input buffer piece. IDPX3 is for the 33MHz PCI ODPSXE16 piece. Logic Symbol Truth Table IDPX3 QC P PADM D PADM QC LL HH HDL Syntax Verilog .................... IDPX3 inst_name (QC, PADM); VHDL...................... inst_name: IDPX3 port map (QC, PADM); Pin Loading Pin Name PADM (pF) Load IDPX3 4.90 Power Characteristics Cell Equivalent Gates IDPX3 0.0 a. See page 2-15 for power equation. Power Characteristicsa Static IDD (TJ = 85°C) (nA) TBD EQLpd (Eq-load) 12.6 Propagation Delays (ns) Conditions: TJ = 25°C, VDD = 5.0V, Typical Process Number of Equivalent Loads 1 IDPX3 From: PADM To: QC tPLH tPHL 0.58 0.71 Delay will vary with input conditions. See page 2-17 for interconnect estimates. 11 0.75 0.82 22 0.86 0.95 32 43 (max) 0.94 1.02 1.07 1.20 Pad Logic 4-5 ...