VOLTAGE DETECTOR. S-80951C Datasheet

S-80951C DETECTOR. Datasheet pdf. Equivalent

Part S-80951C
Description VOLTAGE DETECTOR
Feature S-809xxC Series www.ablicinc.com © ABLIC Inc., 2001-2015 ULTRA-SMALL PACKAGE HIGH-PRECISION VOLTAG.
Manufacture ABLIC
Datasheet
Download S-80951C Datasheet

Rev.3.3_00 ULTRA-SMALL PACKAGE HIGH-PRECISION VOLTAGE DETEC S-80951C Datasheet
S-809xxC Series www.ablicinc.com © ABLIC Inc., 2001-2015 U S-80951C Datasheet
Recommendation Recommendation Datasheet S-80951C Datasheet





S-80951C
S-809xxC Series
www.ablicinc.com
© ABLIC Inc., 2001-2015
ULTRA-SMALL PACKAGE HIGH-PRECISION VOLTAGE DETECTOR
WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
Rev.4.1_02
The S-809xxC Series is a high-precision voltage detector developed using CMOS process. The detection
voltage is fixed internally with an accuracy of 2.0 %. A time delayed reset can be accomplished with the
addition of an external capacitor. Two output forms, Nch open-drain and CMOS output, are available.
Features
Ultra-low current consumption 1.0 A typ. (Detection voltage 1.4 V, at VDD2.0 V)
1.1 A typ. (Detection voltage 1.5 V, at VDD3.5 V)
High-precision detection voltage 2.0 %
Operating voltage range
0.7 V to 10.0 V
Hysteresis characteristics
5 % typ.
Detection voltage
1.3 V to 6.0 V (0.1 V step)
Output forms
Nch open-drain output (Active Low)
CMOS output (Active Low)
Lead-free, Sn 100%, halogen-free*1
*1. Refer to “Product Name Structure” for details.
Applications
Power supply monitor for portable equipment such as notebook PCs, digital still cameras, PDAs and
cellular phones
Constant voltage power monitor for cameras, video equipment and communication equipment
Power monitor and reset for CPUs and microcomputers
Packages
SC-82AB
SOT-23-5
SNT-4A
1



S-80951C
ULTRA-SMALL PACKAGE HIGH-PRECISION VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
S-809xxC Series
Rev.4.1_02
Block Diagrams
1. Nch Open-drain Output Products
VDD
*1
VSS
VREF
*1. Parasitic diode
2. CMOS Output Products
VDD
Delay
circuit
*1
CD
Figure 1
*1
VSS
VREF
*1. Parasitic diode
Delay
circuit
*1
CD
Figure 2
OUT
*1
*1
OUT
*1
2





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