P-Channel MOSFET. ME60P06T Datasheet

ME60P06T MOSFET. Datasheet pdf. Equivalent

Part ME60P06T
Description P-Channel MOSFET
Feature P- Channel 60-V (D-S) MOSFET GENERAL DESCRIPTION The ME60P06T is the P-Channel logic enhancement mod.
Manufacture Matsuki
Datasheet
Download ME60P06T Datasheet

P- Channel 60-V (D-S) MOSFET GENERAL DESCRIPTION The ME60P06 ME60P06T Datasheet
P- Channel 60-V (D-S) MOSFET GENERAL DESCRIPTION The ME60P06 ME60P06T-G Datasheet
Recommendation Recommendation Datasheet ME60P06T Datasheet




ME60P06T
P- Channel 60-V (D-S) MOSFET
GENERAL DESCRIPTION
The ME60P06T is the P-Channel logic enhancement mode power
field effect transistors are produced using high cell density, DMOS
trench technology. This high density process is especially tailored to
minimize on-state resistance.
PIN CONFIGURATION
(TO-220)
Top View
ME60P06T/ME60P06T-G
FEATURES
RDS(ON)16.5mΩ@VGS=-10V
RDS(ON)20.5mΩ@VGS=-4.5V
Super high density cell design for extremely low RDS(ON)
Exceptional on-resistance and maximum DC current
capability
APPLICATIONS
Power Management in Note book
DC/DC Converter
Load Switch
LCD Display inverter
Ordering Information: ME60P06T (Pb-free)
ME60P06T-G (Green product-Halogen free )
Absolute Maximum Ratings (TC=25Unless Otherwise Noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current*
TC=25
TC=70
Pulsed Drain Current
Maximum Power Dissipation*
TC=25
TC=70
Operating Junction Temperature
Thermal Resistance-Junction to Case*
Symbol
VDS
VGS
ID
IDM
PD
TJ
RθJC
Maximum Ratings
-60
±20
-55.3
-46.3
-221
90.9
63.6
-55 to 175
1.65
*The device mounted on 1in2 FR4 board with 2 oz copper
Unit
V
V
A
A
W
/W
DCC
正式發行
May, 2012-Ver1.1
01



ME60P06T
P- Channel 60-V (D-S) MOSFET
ME60P06T/ME60P06T-G
Electrical Characteristics (TC =25Unless Otherwise Specified)
Symbol Parameter
STATIC
V(BR)DSS Drain-Source Breakdown Voltage
VGS(th) Gate Threshold Voltage
IGSS Gate Leakage Current
IDSS Zero Gate Voltage Drain Current
RDS(ON) Drain-Source On-State Resistancea
VSD Diode Forward Voltage
DYNAMIC
Qg Total Gate Charge
Limit
VGS=0V, ID=-250μA
VDS=VGS, ID=-250μA
VDS=0V, VGS=±20V
VDS=-60V, VGS=0V
VGS=-10V, ID= -30A
VGS=-4.5V, ID= -20A
IS=-30A, VGS=0V
VDS=-30V, VGS=-10V, ID=-50A
Min Typ Max
-60
-1 -3
±100
-1
13 16.5
15 20.5
-1.0 -1.5
98.6
Qg Total Gate Charge
Qgs Gate-Source Charge
VDS=-30V, VGS=-4.5V, ID=-50A
50.1
15.9
Qgd Gate-Drain Charge
25.2
Ciss
Input capacitance
4480
Coss
Output Capacitance
VDS=-15V, VGS=0V, F=1MHz
427
Crss
Reverse Transfer Capacitance
355
td(on)
Turn-On Delay Time
tr
td(off)
Turn-On Rise Time
Turn-Off Delay Time
VDS=-30V, RL =30Ω
VGEN=-10V, RG=6Ω
tf Turn-Off Fall Time
Notes:a. Pulse test; pulse width 300us, duty cycle2%
50.7
18.1
221
60.1
b. Matsuki Electric/ Force mos reserves the right to improve product design, functions and reliability without notice.
Unit
V
V
nA
μA
mΩ
V
nC
pF
ns
May, 2012-Ver1.1
DCC
正式發行
02





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