N-Channel MOSFET. ME6970 Datasheet

ME6970 MOSFET. Datasheet pdf. Equivalent

Part ME6970
Description Dual N-Channel MOSFET
Feature Dual N-Channel 20-V (D-S) MOSFET GENERAL DESCRIPTION The ME6970 Dual N-Channel logic enhancement mod.
Manufacture Matsuki
Datasheet
Download ME6970 Datasheet

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Recommendation Recommendation Datasheet ME6970 Datasheet




ME6970
Dual N-Channel 20-V (D-S) MOSFET
GENERAL DESCRIPTION
The ME6970 Dual N-Channel logic enhancement mode power field
effect transistors are produced using high cell density, DMOS trench
technology. This high density process is especially tailored to
minimize on-state resistance. These devices are particularly suited
for low voltage application such as cellular phone and notebook
computer power management and other battery powered circuits
where high-side switching, and low in-line power loss are needed in a
very small outline surface mount package.
PIN CONFIGURATION
(TSSOP-8)
Top View
ME6970/ME6970-G
FEATURES
RDS(ON)21m@VGS=10V
RDS(ON)24m@ VGS=4.5V
RDS(ON)32m@ VGS=2.5V
RDS(ON)50m@ VGS=1.8V
Super high density cell design for extremely low RDS(ON)
Exceptional on-resistance and maximum DC current
capability
APPLICATIONS
Power Management in Note book
Portable Equipment
Battery Powered System
Load Switch
DSC
e Ordering Information: ME6970 (Pb-free)
ME6970-G (Green product-Halogen free)
Absolute Maximum Ratings (TA=25Unless Otherwise Noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
TA=25
TA=70
Pulsed Drain Current
Maximum Power Dissipation
TA=25
TA=70
Operating Junction Temperature
Thermal Resistance-Junction to Ambient*
Symbol
VDS
VGS
ID
IDM
PD
TJ
RθJA
* The device mounted on 1in2 FR4 board with 2 oz copper
Maximum Ratings
20
±12
6.1
4.9
24.4
1.3
0.8
-55 to 150
100
Unit
V
V
A
A
W
℃/W
DCC
正式發行
Apr, 2012-Ver1.2
01



ME6970
Dual N-Channel 20-V (D-S) MOSFET
ME6970/ME6970-G
Electrical Characteristics (TA =25Unless Otherwise Specified)
Symbol Parameter
Limit
STATIC
BVDSS
VGS(th)
IGSS
IDSS
RDS(ON)
Drain-Source Breakdown Voltage
VGS=0V, ID=250μA
Gate Threshold Voltage
VDS=VGS, ID=250μA
Gate Leakage Current
VDS=0V, VGS=±12V
Zero Gate Voltage Drain Current
VDS=16V, VGS=0V
VGS=10V, ID= 7A
Drain-Source On-State Resistance a
VGS=4.5V, ID= 6.6A
VGS=2.5V, ID= 5.5A
VGS=1.8V, ID= 2A
VSD Diode Forward Voltage
IS=1A, VGS=0V
DYNAMIC
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
VDS=10V, VGS=4.5V, ID=7A
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VDS=15V, VGS=0V,f=1MHz
Rg
td(on)
tr
td(off)
tf
Gate resistance
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
VDS=0V, VGS=0V,f=1MHz
VDD=10V, RL =3Ω
VGEN=5V,RG=3Ω
Min Typ Max Unit
20 V
0.5 1 V
±100 nA
1 μA
16.5
21
19 24
mΩ
23 32
30 50
0.7 1
V
9.5
3.9
2.8
690
99
31.3
1.5
13.5
33.6
39.3
4.8
nC
pF
Ω
ns
Notes: a. pulse test: pulse width300us, duty cycle2%, Guaranteed by design, not subject to production testing.
b. Matsuki Electric/ Force mos reserves the right to improve product design, functions and reliability without notice.
DCC
正式發行
Apr, 2012-Ver1.2
02





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