P-Channel MOSFET. ME7835 Datasheet

ME7835 MOSFET. Datasheet pdf. Equivalent

Part ME7835
Description P-Channel MOSFET
Feature P-Channel Enhancement Mode Mosfet GENERAL DESCRIPTION The ME7835 P-Channel logic enhancement mode po.
Manufacture Matsuki
Datasheet
Download ME7835 Datasheet

P-Channel Enhancement Mode Mosfet GENERAL DESCRIPTION The ME ME7835 Datasheet
P-Channel Enhancement Mode Mosfet GENERAL DESCRIPTION The ME ME7835-G Datasheet
P-Channel 30V (D-S) MOSFET GENERAL DESCRIPTION The ME7835S P ME7835S-G Datasheet
Recommendation Recommendation Datasheet ME7835 Datasheet




ME7835
P-Channel Enhancement Mode Mosfet
GENERAL DESCRIPTION
The ME7835 P-Channel logic enhancement mode power field effect
transistors are produced using high cell density, DMOS trench
technology. This high density process is especially tailored to
minimize on-state resistance. These devices are particularly suited
for low voltage application such as cellular phone and notebook
computer power management and other battery powered circuits
where high-side switching , and low in-line power loss are needed in
a very small outline surface mount package.
ME7835/ME7835-G
FEATURES
RDS(ON) 18m@VGS=-10V
RDS(ON) 36m@VGS=-4.5V
APPLICATIONS
Power Management in Note book
Portable Equipment
Battery Powered System
Load Switch
DSC
PIN CONFIGURATION
(DFN 3.3x3.3)
Top View
e Ordering Information: ME7835 (Pb-free)
ME7835-G (Green product-Halogen free)
Absolute Maximum Ratings (Tj=25Unless Otherwise Noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
TA=25
TA=70
Pulsed Drain Current
Maximum Power Dissipation
TA=25
TA=70
Operating Junction Temperature
Thermal Resistance-Junction to Ambient*
Symbol
VDSS
VGSS
ID
IDM
PD
TJ
RθJA
*The device mounted on 1in2 FR4 board with 2 oz copper
Maximum
-30
±25
-11.5
-9.2
-46
3.8
2.4
-55 to 150
33
Unit
V
V
A
A
W
℃/W
DCC
正式發行
May, 2010-Ver1.2
01



ME7835
P-Channel Enhancement Mode Mosfet
ME7835/ME7835-G
Electrical Characteristics (TA =25Unless Otherwise Specified)
Symbol
STATIC
BVDSS
VGS(th)
IGSS
IDSS
Parameter
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate Leakage Current
Zero Gate Voltage Drain Current
RDS(ON)
Drain-Source On-State Resistance a
VSD Diode Forward Voltage
DYNAMIC
Qg Total Gate Charge (-10V)
Qg
Qgs
Qgd
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
Total Gate Charge (-4.5)
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Limit
VGS=0V, ID=-250μA
VDS=VGS, ID=-250μA
VDS=0V, VGS=±25V
VDS=-30V, VGS=0V
VGS=-10V, ID= -8.5A
VGS=-4.5V, ID= -6.3A
IS=-8.5A, VGS=0V
Min Typ Max Unit
-30 V
-1 -3 V
±100
-1
nA
μA
15 18
mΩ
27 36
0.85 1.2
V
VDS=-15V,VGS=-10V,
ID=-8.5A
VDS=-15V, VGS=0V,f=1MHz
VDS=-15V, RL =15Ω
RGEN=6Ω, VGS=-10V
28
14
6
6.5
1180
223
73
39
16
78
19
nC
pF
ns
Note: a.Pulse test: pulse width300us, duty cycle2
b. Matsuki reserves the right to improve product design, functions and reliability without notice.
May, 2010-Ver1.2
DCC
正式發行
02





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