LIN transceiver. 33911 Datasheet

33911 transceiver. Datasheet pdf. Equivalent


Part 33911
Description LIN transceiver
Feature NXP Semiconductors Technical Data MC33910G5AC/MC3433910G5AC LIN system basis chip with DC motor pr.
Manufacture NXP
Datasheet
Download 33911 Datasheet


NXP Semiconductors Technical Data MC33910G5AC/MC3433910G5AC 33911 Datasheet
Recommendation Recommendation Datasheet 33911 Datasheet




33911
NXP Semiconductors
Technical Data
MC33910G5AC/MC3433910G5AC
LIN system basis chip with DC motor
pre-driver
Document Number: MC33911
Rev. 10.0, 7/2016
33911
The 33911G5/BAC is a SMARTMOS Serial Peripheral Interface (SPI) controlled
System Basis Chip (SBC), combining many frequently used functions in an MCU
based system, plus a Local Interconnect Network (LIN) transceiver. The 33911
has a 5.0 V, 50 mA/60 mA low dropout regulator with full protection and reporting
features. The device provides full SPI readable diagnostics and a selectable
timing watchdog for detecting errant operation. The LIN Protocol Specification
2.0 and 2.1 compliant LIN transceiver has waveshaping circuitry which can be
disabled for higher data rates.
One 50 mA/60 mA high-side switch and two 150 mA/160 mA low-side switches
with output protection are available. All outputs can be pulse-width modulated
(PWM). Two high-voltage inputs are available for use in contact monitoring, or
as external wake-up inputs. These inputs can be used as high-voltage Analog
Inputs. The voltage on these pins is divided by a selectable ratio and available
via an analog multiplexer.
The 33911 has three main operating modes: Normal (all functions available),
Sleep (VDD off, wake-up via LIN, wake-up inputs (L1, L2), cyclic sense, and
forced wake-up), and Stop (VDD on with limited current capability, wake-up via
CS, LIN bus, wake-up inputs, cyclic sense, forced wake-up, and external reset).
The 33911 is compatible with LIN Protocol Specification 2.0, 2.1, and
SAEJ2602-2.
Features
• Full-duplex SPI interface at frequencies up to 4.0 MHz
• LIN transceiver capable of up to 100 kbps with wave shaping
• One 50 mA/60 mA high-side and two 150 mA/60 mA low-side protected
switches
• Two high-voltage analog/logic Inputs
• Configurable window watchdog
• 5.0 V low drop regulator with fault detection and low-voltage reset (LVR)
circuitry
SYSTEM BASIS CHIP WITH LIN
AC SUFFIX (Pb-FREE)
98ASH70029A
32-PIN LQFP
Applications
• Window lift
• Mirror switch
• Door lock
• Sunroof
• Light control
VBAT
LIN INTERFACE
MCU
33911
VS1 VSENSE
VS2 HS1
L1
L2
LIN
VDD
PWMIN
ADOUT0
MOSI
MISO
SCLK
CS
RXD
TXD
IRQ
RST
LS1
LS2
WDCONF
M
Figure 1. 33911 simplified application diagram
© 2016 NXP B.V.



33911
1 Orderable parts
The 33911G5 data sheet is within MC33911G5 product specifications - page 3 to page 52.
The 33911BAC data sheet is within MC33911BAC product specifications - page 53 to page 100.
Table 1. Orderable part variations
Device
MC33911G5AC/R2
Temperature
-40 °C to 125 °C
MC34911G5AC/R2 -40 °C to 85 °C
MC33911BAC/R2
MC34911BAC/R2
-40 °C to 125 °C
-40 °C to 85 °C
Package
32-LQFP
Generation
2.5
2.0
• Increase ESD GUN IEC61000-4-2 (gun test contact with 150 pF, 330 Ω
test conditions) performance to achieve ±6.0 kV min on the LIN pin.
• Immunity against ISO7637 pulse 3b
• Reduce EMC emission level on LIN
• Improve EMC immunity against RF – target new specification including 3
x 68 pF
• Comply with J2602 conformance test
Initial release
33911
2
NXP Semiconductors







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)