ISPLSI1048C

ispLSI® 1048C In-System Programmable High Density PLD Features Functional Block Diagram COUMSME iEsDRpECILSISAIGL1N&0SI48NEDAUSFTORRIANLEOutputWRoutingPool Output Routing Pool HIGH-DENSITY PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, 12 Dedicated Inputs, 2 Global Output Enables — 288 Registers — High-Speed Global Interconnect — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc. — Small Logic Block Size for Random Logic — Security Cell Prevents Unauthorized Copying HIGH PERFORMANCE E2CMOS® TECHNOLOGY — fmax = 70 MHz Maximum Operating Frequency — fmax = 50 MHz for Industrial and Military/883 Devices — tpd = 16 ns Propagation Delay — TTL Compatible Inputs and Outputs — Electrically Erasable and Reprogrammable — Non-Volatile E2CMOS Technology — 100% Tested at Time of Manufacture IN-SYSTEM PROGRAMMABLE — In-System Programmable™ (ISP™) 5-Volt Only — Increased Manufacturing Yields, Reduced Time-toMarket, and ...