Reset IC. CN810 Datasheet

CN810 IC. Datasheet pdf. Equivalent


CONSONANCE CN810
CONSONANCE
Ultra Low Power Microprocessor Reset IC
CN803/809/CN810
General Description
The CN803/809/810 series are micro- processor
(µP) supervisory circuits used to monitor the
power supplies in µP and digital systems. They
provide excellent circuit reliability and low cost
by eliminating external components.
These circuits perform a single function: they
assert a reset signal whenever the VCC supply
voltage declines below a preset threshold, keeping
it asserted for at least 140ms after VCC has risen
above the reset threshold.
The CN809/810 have CMOS outputs, the CN803
has open drain output. The CN803/809 have an
active-low
output, while the CN810 has
an active-high RESET output. The reset
comparator is designed to ignore fast transients on
VCC, and the outputs are guaranteed to be in the
correct logic state for VCC down to 1.15V over the
temperature range.
The device is available in 3 pin SOT23 package.
Features
Precise Reset Threshold: ±2.5%
CMOS Output(CN809/810) and Open Drain
Output(CN803)
140ms min Reset Pulse Width
3.2µA Supply Current @VCC=3V
Guaranteed Reset Valid to VCC = +1.15V
Power Supply Transient Immunity
Operating Temperature Range
-40°C to +85°C
Available in SOT23-3
Pin Assignment
GND 1
RESET 2
(RESET)
CN803
CN809
CN810
3 VCC
SOT23-3
Applications
Computers
Portable/Battery-Powered Equipment
Intelligent Instruments
Controllers
( ) is for CN810 only
www.consonance-elec.com
Rev 1.2
1


CN810 Datasheet
Recommendation CN810 Datasheet
Part CN810
Description Ultra Low Power Microprocessor Reset IC
Feature CN810; CONSONANCE Ultra Low Power Microprocessor Reset IC CN803/809/CN810 General Description The CN803/.
Manufacture CONSONANCE
Datasheet
Download CN810 Datasheet




CONSONANCE CN810
Device Function Reference Table:
Part No.
CN809L
CN810L
CN809M
CN810M
CN809J
CN809T
CN803S
CN809S
CN810S
CN803R
CN809R
Reset
threshold
4.63V
4.63V
4.38V
4.38V
4.00V
3.08V
2.93V
2.93V
2.93V
2.63V
2.63V
Reset active
Low or High
Low
High
Low
High
Low
Low
Low
Low
High
Low
Low
Output Type
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
Open Drain
CMOS
CMOS
Open Drain
CMOS
Marking
AAAA
AGAA
ABAA
AHAA
CWAA
ACAA
ABC
ADAA
AKAA
ABD
AFAA
Block Diagram
VCC
OSC
1.25V
+
COMP
-
VCC
Delay
Generator
RESET
(RESET)
GND
Fig.1 Block Diagram For CMOS Output
Rev 1.2
2



CONSONANCE CN810
Pin Description
Pin No.
1
2
3
Symbol
GND
(CN809)
RESET
(CN810)
(CN803)
VCC
Description
Ground terminal
CMOS Output. This output remains low if VCC drops
below VRES, and for at least 140ms after VCC rises above
VRES + VHYST .
CMOS Output. This output remains high if VCC drops
below VRES, and for at least 140ms after VCC rises above
VRES + VHYST.
Open Drain Output. This output remains low if VCC
drops below VRES, and for at least 140ms after VCC rises
above VRES + VHYST .
Analog Input. This pin is both the power supply to
internal circuit and the voltage to be monitored.
ABSOLUTE MAXIMUM RATINGS
Terminal Voltage (With respect to GND)
VCC.............…...…......-0.3V to +6.0V
, RESET …....-0.3V to +6.0V
Input/Output Current
VCC .........................................20mA
, RESET ..…….….....20mA
Thermal Resistance…………………..300°C/W
Operating Temperature.…..……...-40 to +85°C
Storage Temperature.....…….......-65 to +150°C
Maximum Junction Temperature... +150°C
Lead Temperature (soldering, 10s) .......+300°C
ESD Rating(HBM)……….……….………4KV
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. These are stress ratings only, and functional operation of the device at these or any other
conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect device reliability.
Rev 1.2
3







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