FLASH MEMORY. KH25L12835F Datasheet

KH25L12835F MEMORY. Datasheet pdf. Equivalent

KH25L12835F Datasheet
Recommendation KH25L12835F Datasheet
Part KH25L12835F
Description 3V 128M-BIT [x 1/x 2/x 4] CMOS MXSMIO FLASH MEMORY
Feature KH25L12835F; KH25L12835F KH25L12835F DATASHEET P/N: PM1939 KH25L12835F Contents 1. FEATURES....................
Manufacture macronix
Datasheet
Download KH25L12835F Datasheet




macronix KH25L12835F
KH25L12835F
KH25L12835F
DATASHEET
P/N: PM1939



macronix KH25L12835F
KH25L12835F
Contents
1. FEATURES............................................................................................................................................................... 4
2. GENERAL DESCRIPTION...................................................................................................................................... 6
Table 1. Read performance Comparison.....................................................................................................6
3. PIN CONFIGURATIONS .......................................................................................................................................... 7
4. PIN DESCRIPTION................................................................................................................................................... 7
5. BLOCK DIAGRAM.................................................................................................................................................... 8
6. DATA PROTECTION................................................................................................................................................. 9
Table 2. Protected Area Sizes....................................................................................................................10
Table 3. 4K-bit Secured OTP Definition..................................................................................................... 11
7. Memory Organization............................................................................................................................................ 12
Table 4. Memory Organization...................................................................................................................12
8. DEVICE OPERATION............................................................................................................................................. 13
8-1. Quad Peripheral Interface (QPI) Read Mode........................................................................................... 15
9. COMMAND DESCRIPTION.................................................................................................................................... 16
Table 5. Command Set...............................................................................................................................16
9-1. Write Enable (WREN)............................................................................................................................... 20
9-2. Write Disable (WRDI)................................................................................................................................ 21
9-3. Read Identification (RDID)........................................................................................................................ 22
9-4. Release from Deep Power-down (RDP), Read Electronic Signature (RES)............................................ 23
9-5. Read Electronic Manufacturer ID & Device ID (REMS)............................................................................ 25
9-6. QPI ID Read (QPIID)................................................................................................................................ 26
Table 6. ID Definitions ...............................................................................................................................26
9-7. Read Status Register (RDSR).................................................................................................................. 27
9-8. Read Configuration Register (RDCR)....................................................................................................... 28
Table 7. Configuration Register Table........................................................................................................32
9-9. Write Status Register (WRSR).................................................................................................................. 34
Table 8. Protection Modes..........................................................................................................................35
9-10. Read Data Bytes (READ)......................................................................................................................... 38
9-11. Read Data Bytes at Higher Speed (FAST_READ)................................................................................... 39
9-12. Dual Output Read Mode (DREAD)........................................................................................................... 40
9-13. 2 x I/O Read Mode (2READ).................................................................................................................... 41
9-14. Quad Read Mode (QREAD)..................................................................................................................... 42
9-15. 4 x I/O Read Mode (4READ).................................................................................................................... 43
9-16. Burst Read................................................................................................................................................ 45
9-17. Performance Enhance Mode.................................................................................................................... 46
9-18. Performance Enhance Mode Reset ......................................................................................................... 49
9-19. Fast Boot.................................................................................................................................................. 50
9-20. Sector Erase (SE)..................................................................................................................................... 53
9-21. Block Erase (BE32K)................................................................................................................................ 54
9-22. Block Erase (BE)...................................................................................................................................... 55
9-23. Chip Erase (CE)........................................................................................................................................ 56
9-24. Page Program (PP).................................................................................................................................. 57
9-25. 4 x I/O Page Program (4PP)..................................................................................................................... 59
P/N: PM1939
REV. 1.0, MAR. 27, 2013
2



macronix KH25L12835F
KH25L12835F
9-26. Deep Power-down (DP)............................................................................................................................ 60
9-27. Enter Secured OTP (ENSO)..................................................................................................................... 61
9-28. Exit Secured OTP (EXSO)........................................................................................................................ 61
9-29. Read Security Register (RDSCUR).......................................................................................................... 61
9-30. Write Security Register (WRSCUR).......................................................................................................... 61
Table 9. Security Register Definition..........................................................................................................62
9-31. Write Protection Selection (WPSEL)......................................................................................................... 63
9-32. Advanced Sector Protection..................................................................................................................... 65
9-33. Lock Register............................................................................................................................................ 66
9-34. SPB Lock Bit (SPBLB).............................................................................................................................. 67
9-35. Solid Protection Bits.................................................................................................................................. 68
9-36. Dynamic Write Protection Bits.................................................................................................................. 70
9-37. Temporary Un-protect Solid write protect bit (USPB) .............................................................................. 71
9-38. Gang Block Lock/Unlock (GBLK/GBULK)................................................................................................ 71
9-39. Password Protection Mode....................................................................................................................... 72
9-40. Program/Erase Suspend/Resume............................................................................................................ 74
9-41. Erase Suspend......................................................................................................................................... 74
9-42. Program Suspend..................................................................................................................................... 74
9-43. Write-Resume........................................................................................................................................... 76
9-44. No Operation (NOP)................................................................................................................................. 76
9-45. Software Reset (Reset-Enable (RSTEN) and Reset (RST)).................................................................... 76
9-46. Read SFDP Mode (RDSFDP)................................................................................................................... 78
Table 10. Signature and Parameter Identification Data Values .................................................................79
Table 11. Parameter Table (0): JEDEC Flash Parameter Tables...............................................................80
Table 12. Parameter Table (1): Macronix Flash Parameter Tables............................................................82
10. RESET.................................................................................................................................................................. 84
Table 13. Reset Timing-(Power On)...........................................................................................................84
Table 14. Reset Timing-(Other Operation).................................................................................................84
11. POWER-ON STATE.............................................................................................................................................. 85
12. ELECTRICAL SPECIFICATIONS......................................................................................................................... 86
Table 15. ABSOLUTE MAXIMUM RATINGS.............................................................................................86
Table 16. CAPACITANCE TA = 25°C, f = 1.0 MHz.....................................................................................86
Table 17. DC CHARACTERISTICS ..........................................................................................................88
Table 18. AC CHARACTERISTICS ..........................................................................................................89
13. OPERATING CONDITIONS.................................................................................................................................. 91
Table 19. Power-Up/Down Voltage and Timing..........................................................................................93
13-1. INITIAL DELIVERY STATE....................................................................................................................... 93
14. ERASE AND PROGRAMMING PERFORMANCE............................................................................................... 94
15. DATA RETENTION............................................................................................................................................... 94
16. LATCH-UP CHARACTERISTICS......................................................................................................................... 94
17. ORDERING INFORMATION................................................................................................................................. 95
18. PART NAME DESCRIPTION................................................................................................................................ 96
19. PACKAGE INFORMATION................................................................................................................................... 97
P/N: PM1939
REV. 1.0, MAR. 27, 2013
3







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)