System Controller. 82439TX Datasheet

82439TX Datasheet PDF, Equivalent


Part Number

82439TX

Description

System Controller

Manufacture

Intel

Total Page 20 Pages
PDF Download
Download 82439TX Datasheet


82439TX Datasheet
Preliminary
82439TX System Controller (MTXC)
SmartDie® Product Specification
s Supports the Pentium® Processor
Family Host Bus at 66 MHz and 60 MHz
at 3.3 V and 2.5 V
s PCI 2.1 Compliant
s Integrated Data Path
s Integrated DRAM Controller
— 4 Mbytes to 256 Mbytes Main
Memory
— 64-Mbit DRAM/SRAM Technology
Support
— FPM (Fast Page Mode), EDO, and
SDRAM DRAM support
— 6 RAS Lines Available
— Integrated Programmable Strength
for DRAM Interface
— CAS-Before-RAS Refresh,
Extended Refresh and Self Refresh
for EDO
— CAS-Before-RAS and Self Refresh
for SDRAM
s Integrated L2 Cache Controller
— 64 Mbyte DRAM Cacheability
— Direct Mapped Organization–Write
Back Only
— Supports 256 Kbyte and 512 Kbyte
Pipelined Burst SRAM and DRAM
Cache
— Cache Hit Read/Write Cycle
Timings at 3-1-1-1
— Back-to-Back Read/Write Cycles at
3-1-1-1-1-1-1-1
— 64 K x 32 SRAM Also Supported
s Fully Synchronous, Minimum Latency
30/33 MHz PCI Bus Interface
— Five PCI Bus Masters (Including
PIIX4)
— 10 DWord PCI-to-DRAM Read
Prefetch Buffer
— 18 Dword PCI-DRAM Post Buffer
— Multi-Transaction Timer to Support
Multiple Short PCI Transactions
s Power Management
— PCI CLKRUN# Support
— Dynamic Stop Clock Support
— Suspend to RAM (STR)
— Suspend to Disk (STD)
— Power On Suspend (POS)
— Internal Clock Control
— SDRAM and EDO Self Refresh
During Suspend
— ACPI Support
— Compatible SMRAM (C-SMRAM) and
Extended SMRAM (E-SMRAM)
— SMM Write-Back Cacheable in
E_SMRAM Mode up to 1 Mbyte
— 3.3/5 V DRAM, 3.3/5 V PCI, 3.3/5 V
Tag, and 3.3/2.5 V SRAM Support
s Test Features
— NAND Tree Support for All Pins
s Supports the Universal Serial Bus (USB)
s Intel SmartDie® Product
— Full AC/DC Testing at Die Level
— 0°C to 105°C (Junction) Temperature
Range
NOTICE: This document contains preliminary information on new products in production. It is valid for the
devices indicated in "DEVICE NOMENCLATURE" on page 16. This specification is subject to change
without notice. Verify with your local Intel sales office that you have the latest product specification before
finalizing a design.
REFERENCE INFORMATION: The information in this document is provided as a supplement to the
standard package datasheet on a specific product. Please refer to the standard package datasheet (order
number 290559) for product information and specifications not found in this document.
© INTEL CORPORATION, 1997
August 1997
Order Number: 273005-002

82439TX Datasheet
Information in this document is provided in connection with Intel products. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in
Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel
disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or
warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright
or other intellectual property right. Intel products are not intended for use in medical, life saving, or life
sustaining applications.
Intel retains the right to make changes to specifications and product descriptions at any time, without notice.
*Third-party brands and names are the property of their respective owners.
Copies of documents which have an ordering number and are referenced in this document, or other Intel
literature, may be obtained from:
Intel Corporation
P.O. Box 7641
Mt. Prospect IL 60056-764
or call 1-800-548-4725
©INTEL CORPORATION, 1997


Features Datasheet pdf Preliminary 82439TX System Controller ( MTXC) SmartDie® Product Specification s Supports the Pentium® Processor Fam ily Host Bus at 66 MHz and 60 MHz at 3. 3 V and 2.5 V s PCI 2.1 Compliant s Int egrated Data Path s Integrated DRAM Con troller — 4 Mbytes to 256 Mbytes Main Memory — 64-Mbit DRAM/SRAM Technolog y Support — FPM (Fast Page Mode), EDO , and SDRAM DRAM support — 6 RAS Line s Available — Integrated Programmable Strength for DRAM Interface — CAS-Be fore-RAS Refresh, Extended Refresh and Self Refresh for EDO — CAS-Before-RAS and Self Refresh for SDRAM s Integrate d L2 Cache Controller — 64 Mbyte DRAM Cacheability — Direct Mapped Organiz ation–Write Back Only — Supports 25 6 Kbyte and 512 Kbyte Pipelined Burst S RAM and DRAM Cache — Cache Hit Read/W rite Cycle Timings at 3-1-1-1 — Back- to-Back Read/Write Cycles at 3-1-1-1-1- 1-1-1 — 64 K x 32 SRAM Also Supported s Fully Synchronous, Minimum Latency 30/33 MHz PCI Bus Interface — Five PCI Bus Masters (Including.
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