Audio ADC. ES8288 Datasheet

ES8288 ADC. Datasheet pdf. Equivalent

ES8288 Datasheet
Recommendation ES8288 Datasheet
Part ES8288
Description Low Power Stereo Audio ADC
Feature ES8288; ES8288 Low Power Stereo Audio ADC GENERAL DESCRIPTION ES8288 is a high performance, low power and .
Manufacture Everest Semiconductor
Datasheet
Download ES8288 Datasheet




Everest Semiconductor ES8288
ES8288
Low Power Stereo Audio ADC
GENERAL DESCRIPTION
ES8288 is a high performance, low
power and low cost audio ADC. It
consists of 2-ch ADC, microphone
amplifier and auto level control.
The device uses advanced multi-bit
delta-sigma modulation technique
to convert data between digital and
analog. The multi-bit delta-sigma
modulators make the device with
low sensitivity to clock jitter and low
out of band noise.
FEATURES
ADC
24-bit, 8 kHz to 96 kHz sampling frequency
95 dB dynamic range, 95 dB signal to noise ratio,
-85 dB THD+N
Stereo or mono microphone interface with
microphone amplifier
Auto level control and noise gate
2-to-1 analog input selection
Low Power
1.8V to 3.3V operation
9 mW recording
System
I2C or SPI uC interface
256Fs, 384Fs, USB 12 MHz or 24 MHz
Master or slave serial port
I2S, Left Justified, DSP/PCM Mode
APPLICATIONS
Portable audio recording
ORDERING INFORMATION
ES8288 -40°C ~ +85°C
QFN-28
Revision 6.0
1 November 2016



Everest Semiconductor ES8288
Everest Semiconductor
ES8288
1 BLOCK DIAGRAM.....................................................................................3
2 28-PIN QFN AND PIN DESCRIPTIONS....................................................4
3 TYPICAL APPLICATION CIRCUIT ............................................................6
4 CLOCK MODES AND SAMPLING FREQUENCIES..................................6
5 MICRO-CONTROLLER CONFIGURATION INTERFACE .........................8
5.1 SPI ......................................................................................................8
5.2 2-wire ..................................................................................................9
6 CONFIGURATION REGISTER DEFINITION ..........................................10
6.1 Chip Control and Power Management .............................................. 11
6.1.1 Register 0 – Chip Control 1, Default 0000 0110 .......................... 11
6.1.2 Register 1 – Chip Control 2, Default 0001 1100 .......................... 11
6.1.3 Register 2 – Chip Power Management, Default 1100 0011......... 11
6.1.4 Register 3 – ADC Power Management, Default 1111 1100 .........12
6.1.5 Register 5 – Chip Low Power 1, Default 0000 0000....................12
6.1.6 Register 6 – Chip Low Power 2, Default 0000 0000....................12
6.1.7 Register 7 – Analog Voltage Management, Default 0111 1100....12
6.1.8 Register 8 – Master Mode Control, Default 1000 0000 ...............13
6.2 ADC Control ......................................................................................13
6.2.1 Register 9 – ADC Control 1, Default 0000 0000..........................13
6.2.2 Register 10 – ADC Control 2, Default 0000 0000........................13
6.2.3 Register 11 – ADC Control 3, Default 0000 0110 ........................14
6.2.4 Register 12 – ADC Control 4, Default 0000 0000........................14
6.2.5 Register 13 – ADC Control 5, Default 0000 0110 ........................14
6.2.6 Register 14 – ADC Control 6, Default 0011 0000 ........................15
6.2.7 Register 15 – ADC Control 7, Default 0011 0000 ........................15
6.2.8 Register 16 – ADC Control 8, Default 1100 0000 ........................16
6.2.9 Register 17 – ADC Control 9, Default 1100 0000 ........................16
6.2.10 Register 18 – ADC Control 10, Default 0011 1000 ......................16
6.2.11 Register 19 – ADC Control 11, Default 1011 0000 ......................17
6.2.12 Register 20 – ADC Control 12, Default 0011 0010 ......................17
6.2.13 Register 21 – ADC Control 13, Default 0000 0110 ......................18
6.2.14 Register 22 – ADC Control 14, Default 0000 0000......................18
6.2.15 Register 43 – ADC Control 15, Default 0011 1000 ......................18
7 Digital Audio Interface..............................................................................19
8 ELECTRICAL CHARACTERISTICS........................................................20
8.1 Absolute Maximum Ratings...............................................................20
8.2 Recommended Operating Conditions ...............................................20
8.3 ADC Analog and Filter Characteristics and Specifications ................20
8.4 Power Consumption Characteristics .................................................21
8.5 Serial Audio Port Switching Specifications ........................................21
8.6 Serial Control Port Switching Specifications ......................................22
9 PACKAGE INFORMATION......................................................................24
10 CORPOARATION INFORMATION .......................................................25
Revision 6.0
2 November 2016



Everest Semiconductor ES8288
Everest Semiconductor
1 BLOCK DIAGRAM
DVDD PVDD DGND
AVDD AGND AVDD AGND
ES8288
VREF VMID
LIN1
LIN2
mux
mic amp
mux
ADC ALC
micL+micR
LIN1-RIN1
LIN2-RIN2
RIN1
RIN2
mux
mic amp
mux
ADC ALC
micL+micR
LIN1-RIN1
LIN2-RIN2
Clock Manager
uC Interface
MCLK
CE CCLK CDATA
Serial Audio Data
ASDOUT LRCK DSDIN SCLK
Revision 6.0
3 November 2016







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)