Buck Regulator. MIC26603 Datasheet

MIC26603 Regulator. Datasheet pdf. Equivalent

MIC26603 Datasheet
Recommendation MIC26603 Datasheet
Part MIC26603
Description Synchronous DC/DC Buck Regulator
Feature MIC26603; MIC26603 28V, 6A Hyper Light Load™ Synchronous DC/DC Buck Regulator SuperSwitcher IIG™ General Desc.
Manufacture Micrel Semiconductor
Datasheet
Download MIC26603 Datasheet





Micrel Semiconductor MIC26603
MIC26603
28V, 6A Hyper Light Load
Synchronous DC/DC Buck Regulator
SuperSwitcher IIG
General Description
Features
The Micrel MIC26603 is a constant-frequency,
synchronous DC/DC buck regulator featuring adaptive on-
time control architecture. The MIC26603 operates over a
supply range of 4.5V to 28V. It has an internal linear
regulator which provides a regulated 5V to power the
internal control circuitry. MIC26603 operates at a constant
600kHz switching frequency in continuous-conduction
mode and can be used to provide up to 6A of output
current. The output voltage is adjustable down to 0.8V.
Micrel’s Hyper Light Loadarchitecture provides the same
high-efficiency and ultra-fast transient response as the
Hyper Speed Controlarchitecture under medium to heavy
loads, but also maintains high efficiency under light load
conditions by transitioning to variable-frequency,
discontinuous-mode operation.
The MIC26603 offers a full suite of protection features to
ensure protection of the IC during fault conditions. These
include undervoltage lockout to ensure proper operation
under power-sag conditions, thermal shutdown, internal
soft-start to reduce the inrush current, foldback current
limit and “hiccup mode” short-circuit protection. The
MIC26603 includes a Power Good (PG) output to allow
simple sequencing.
All support documentation can be found on Micrel’s web
site at: www.micrel.com.
Hyper Light Loadefficiency – up to 80% at 10mA
Hyper Speed Controlarchitecture enables
High Delta V operation (VIN = 28V and VOUT = 0.8V)
Small output capacitance
Input voltage range: 4.5V to 28V
Output current up to 6A
Up to 95% Efficiency
Adjustable output voltage from 0.8V to 5.5V
±1% FB accuracy
Any CapacitorTM stable zero-to-high ESR
600kHz switching frequency
Power Good (PG) output
Foldback current-limit and “hiccup mode” short-circuit
protection
Safe start-up into pre-biased loads
5mm x 6mm MLF® package
–40°C to +125°C junction temperature range
Applications
Distributed power systems
Telecom/networking infrastructure
Printers, scanners, graphic cards, and video cards
___________________________________________________________________________________________________________
Typical Application
100
95
90
85
80
75
70
65
60
55
50
0
Efficiency (VIN = 12V)
vs. Output Current
5.0V
3.3V
2.5V
1.8V
1.5V
1.2V
1.0V
0.9V
0.8V
1 2345 67
OUTPUT CURRENT (A)
8
Hyper Speed Control, Hyper Light Load, SuperSwitcher II, and Any Capacitor are trademarks of Micrel, Inc.
MLF and MicroLeadFrame are registered trademarks of Amkor Technology, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
July 2011
M9999-071311-A



Micrel Semiconductor MIC26603
Micrel, Inc.
MIC26603
Ordering Information
Part Number
MIC26603YJL
Voltage
Adjustable
Switching Frequency
600kHz
Junction Temperature
Range
–40°C to +125°C
Package
28-Pin 5mm × 6mm MLF®
Lead Finish
Pb-Free
Pin Configuration
28-Pin 5mm x 6mm MLF® (YJL)
Pin Description
Pin Number Pin Name
1 PVDD
3 NC
4, 9, 10, 11, 12
SW
2, 5, 6, 7, 8, 21
PGND
13,14,15,
16,17,18,19
20
PVIN
BST
Pin Function
5V Internal Linear Regulator (Output): PVDD supply is the power MOSFET gate drive supply voltage
and created by internal LDO from VIN. When VIN < +5.5V, PVDD should be tied to PVIN pins.
A 2.2µF ceramic capacitor from the PVDD pin to PGND (pin 2) must be place next to the IC.
No Connect.
Switch Node (Output): Internal connection for the high-side MOSFET source and low-side MOSFET
drain. Due to the high speed switching on this pin, the SW pin should be routed away from sensitive
nodes.
Power Ground. PGND is the ground path for the MIC26603 buck converter power stage. The PGND
pins connect to the low-side N-Channel internal MOSFET gate drive supply ground, the sources of
the MOSFETs, the negative terminals of input capacitors, and the negative terminals of output
capacitors. The loop for the power ground should be as small as possible and separate from the
Signal ground (SGND) loop.
High-Side N-internal MOSFET Drain Connection (Input): The PVIN operating voltage range is from
4.5V to 26V. Input capacitors between the PVIN pins and the power ground (PGND) are required
and keep the connection short.
Boost (output): Bootstrapped voltage to the high-side N-channel MOSFET driver. A Schottky diode is
connected between the PVDD pin and the BST pin. A boost capacitor of 0.1μF is connected between
the BST pin and the SW pin. Adding a small resistor at the BST pin can slow down the turn-on time
of high-side N-Channel MOSFETs.
July 2011
2 M9999-071311-A



Micrel Semiconductor MIC26603
Micrel, Inc.
MIC26603
Pin Description (Continued)
Pin Number
22
23
24
25
26
27
28
Pin Name
CS
SGND
FB
PG
EN
VIN
VDD
Pin Function
Current Sense (input): The CS pin senses current by monitoring the voltage across the low-side
MOSFET during the OFF-time. The current sensing is necessary for short circuit protection and zero
current cross comparator. In order to sense the current accurately, connect the low-side MOSFET
drain to SW using a Kelvin connection. The CS pin is also the high-side MOSFET’s output driver
return.
Signal ground. SGND must be connected directly to the ground planes. Do not route the SGND pin
to the PGND Pad on the top layer, see PCB layout guidelines for details.
Feedback (Input): Input to the transconductance amplifier of the control loop. The FB pin is
regulated to 0.8V. A resistor divider connecting the feedback to the output is used to adjust the
desired output voltage.
Power Good (Output): Open Drain Output. The PG pin is externally tied with a resistor to VDD. A
high output is asserted when VOUT > 92% of nominal.
Enable (input): A logic level control of the output. The EN pin is CMOS-compatible. Logic high =
enable, logic low = shutdown. In the off state, supply current of the device is greatly reduced
(typically 5µA). The EN pin should not be left open.
Power Supply Voltage (Input): Requires bypass capacitor to SGND.
5V Internal Linear Regulator (Output): VDD supply is the supply bus for the IC control circuit. VDD is
created by internal LDO from VIN. When VIN < +5.5V, VDD should be tied to PVIN pins. A 1.0µF
ceramic capacitor from the VDD pin to SGND pins must be place next to the IC.
July 2011
3 M9999-071311-A





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