Document
BCR 569
PNP Silicon Digital Transistor • Switching circuit, inverter, interface circuit, driver circuit • Built in bias resistor (R1=4.7kΩ)
Type BCR 569
Marking Ordering Code XLs UPON INQUIRY
Pin Configuration 1=B 2=E 3=C
Package SOT-23
Maximum Ratings Parameter Collector-emitter voltage Collector-base voltage Emitter-base voltage Input on Voltage DC collector current Total power dissipation, TS = 79 °C Junction temperature Storage temperature Symbol Values 50 50 5 30 500 330 150 - 65 ... + 150 mA mW °C Unit V
VCEO VCBO VEBO Vi(on) IC Ptot Tj Tstg
Thermal Resistance Junction ambient
1)
RthJA RthJS
6cm2 Cu
≤ 325 ≤ 215
K/W
Junction - soldering point
1) Package mounted on pcb 40mm x 40mm x 1.5mm /
Semiconductor Group
1
Nov-27-1996
BCR 569
Electrical Characteristics at TA=25°C, unless otherwise specified Parameter Symbol min. DC Characteristics Collector-emitter breakdown voltage Values typ. max. Unit
V(BR)CEO
50 4.7 -
V
IC = 100 µA, IB = 0
Collector-base breakdown voltage
V(BR)CBO
50
IC = 10 µA, IB = 0
Base-emitter breakdown voltage
V(BR)EBO
5
IE = 10 µA, IC = 0
Collector cutoff current
ICBO
100
nA 120 630 mV 0.3 V 0.4 0.8 1.5 6.2 kΩ
VCB = 40 V, IE = 0
DC current gain
hFE VCEsat Vi(off) Vi(on)
0.5
IC = 50 mA, VCE = 5 V
Collector-emitter saturation voltage 1)
IC = 50 mA, IB = 2.5 mA
Input off voltage
IC = 100 µA, VCE = 5 V
Input on Voltage
IC = 10 mA, VCE = 0.3 V
Input resistor AC Characteristics Transition frequency
R1
3.2
fT
150 -
MHz
IC = 50 mA, VCE = 5 V, f = 100 MHz 1) Pulse test: t < 300µs; D < 2%
Semiconductor Group
2
Nov-27-1996
BCR 569
DC Current Gain hFE = f (IC) VCE = 5V (common emitter configuration)
Collector-Emitter Saturation Voltage VCEsat = f(IC), hFE = 20
10 3
10 3
-
mA
hFE
10 2
IC
10 2
10 1
10 1
10 0 -1 10
10
0
10
1
10
2
mA
10 0 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
IC
V 1.0 V CEsat
Input on Voltage Vi(on) = f(IC) VCE = 0.3V (common emitter configuration)
Input off voltage Vi(off) = f(IC) VCE = 5V (common emitter configuration)
10 3 mA
10 1
mA
IC
10 2
IC
10 0
10 1
10 0 10 -1
10 -1
10 -2 -1 10
10
0
10
1
V
10 -2 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
V i(on)
V 1.0 V i(off)
Semiconductor Group
3
Nov-27-1996
BCR 569
Total power dissipation Ptot = f (TA*;TS) * Package mounted on epoxy
400
mW
Ptot
300
TS TA
250
200
150
100
50 0 0 20 40 60 80 100 120 °C 150 TA ,TS
Permissible Pulse Load RthJS = f(tp)
Permissible Pulse Load Ptotmax / PtotDC = f(tp)
10 3
10 4
K/W
-
RthJS
10 2
Ptotmax/P totDC 10 3
D=0 0.005 0.01 0.02 0.05 0.1 0.2 0.5
10 1 0.5 0.2 0.1 0.05 0.02 0.01 0.005 D=0
10 2
10 0
10 1
10 -1 -6 10
10
-5
10
-4
10
-3
10
-2
10 s 10 tp
-1
0
10 0 -6 10
10
-5
10
-4
10
-3
10
-2
10 s 10 tp
-1
0
Semiconductor Group
4
Nov-27-1996
.